• Title/Summary/Keyword: high-throughput

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A High Throughput Multiple Transform Architecture for H.264/AVC Fidelity Range Extensions

  • Ma, Yao;Song, Yang;Ikenaga, Takeshi;Goto, Satoshi
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.4
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    • pp.247-253
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    • 2007
  • In this paper, a high throughput multiple transform architecture for H.264 Fidelity Range Extensions (FRExt) is proposed. New techniques are adopted which (1) regularize the $8{\times}8$ integer forward and inverse DCT transform matrices, (2) divide them into four $4{\times}4$ sub-matrices so that simple fast butterfly algorithm can be used, (3) because of the similarity of the sub-matrices, mixed butterflies are proposed that all the sub-matrices of $8{\times}8$ and matrices of $4{\times}4$ forward DCT (FDCT), inverse DCT (IDCT) and Hadamard transform can be merged together. Based on these techniques, a hardware architecture is realized which can achieve throughput of 1.488Gpixel/s when processing either $4{\times}4\;or\;8{\times}8$ transform. With such high throughput, the design can satisfy the critical requirement of the real-time multi-transform processing of High Definition (HD) applications such as High Definition DVD (HD-DVD) ($1920{\times}1080@60Hz$) in H.264/AVC FRExt. This work has been synthesized using Rohm 0.18um library. The design can work on a frequency of 93MHz and throughput of 1.488Gpixel/s with a cost of 56440 gates.

Frequency Reuse and Sub-cell Coverage Determination Scheme for Improved Throughput in OFDMA-based Relay Systems (OFDMA 기반 Relay 시스템에서 Throughput 개선을 위한 자원 재사용과 커버리지 설정기법)

  • Hyun, Myung-Reun;Choi, Ho-Young;Hong, Dae-Hyoung;Lim, Jae-Chan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.5A
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    • pp.414-420
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    • 2009
  • In this paper, we investigate throughput performance of OFDMA-based relay systems according to the "sub-cell coverage configuration" of the base station (RS) and the relay station (RS). RS is exploited for improved quality of the received signal with a tradeoff of additional radio resource consumption which may result in degradation of the throughput performance of the system. Therefore, "radio resource reuse" may be necessary for high performance in relay systems. However, it also causes system performance degradation since resource reuse between RSs incurs channel interference. Therefore, effective resource reuse also should be considered for "high throughput coverage configuration" when relays are employed. We relate the resource reuse patterns of neighboring RSs to sub-cell coverage configuration. We determine the sub-cell coverage of the system depending on the ratio of received signal-interference-noise-ratio (SINR) of the mobile station (MS) from the BS and RS, respectively. Simulations illustrate the throughput performance as the function of SINR ratio, and it has different optimal point depending on the resource reuse patterns. Therefore, the "resource reuse pattern" and the "effective sub-cell coverage configuration" should be considered together for the high throughput performance of the relay system.

Development of a FRET-based High-Throughput Screening System for the Discovery of Hsp90 Inhibitors

  • Oh, Sang-Mi;Ko, Yeon-Jin;Lee, Han-Jae;Kim, Jong-Hoon;Chung, Young-Sun;Park, Seung-Bum
    • Bulletin of the Korean Chemical Society
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    • v.32 no.9
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    • pp.3229-3232
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    • 2011
  • A FRET-based high-throughput screening system was developed for the discovery of competitive smallmolecule Hsp90 inhibitors. The biarsenical fluorescein derivative FlAsH and dabcyl-conjugated Hsp90 inhibitor GM were employed as the FRET donor and quencher, respectively. The spatial proximity perturbation between FlAsH-labeled Hsp90N and GM-dabcyl upon treatment of a small molecule led to changes in the FRET-induced fluorescence, monitored in a high-throughput fashion.

High throughput sorting(HTS) system using a cantilever-type electrode array (캔틸레버(Cantilever) 형태의 전극 어레이(array)를 이용한고속 분리 시스템)

  • Lee, Jung-Hun;Kim, Young-Ho;Kim, Young-Geun;Kim, Byung-Kyu
    • Journal of Sensor Science and Technology
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    • v.19 no.2
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    • pp.112-117
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    • 2010
  • A high-throughput sorting (HTS) system has been designed to separate target particles using a negative dielectrophoretic (n-DEP) force. The system consists of a meso-sized channel and a cantilever-type electrode(CE) array designed to separate a large number of target particles by discerning subtle difference of weight and dielectric material property of the particles. Using the polystyrene beads with various sizes of 10, 25 and $50{\mu}m$, the developed system exhibits high-throughput sorting of about 200 beads/sec and more than 80 % of separation efficiency.

Recent advances in microfluidic technologies for biochemistry and molecular biology

  • Cho, Soong-Won;Kang, Dong-Ku;Choo, Jae-Bum;Demllo, Andrew J.;Chang, Soo-Ik
    • BMB Reports
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    • v.44 no.11
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    • pp.705-712
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    • 2011
  • Advances in the fields of proteomics and genomics have necessitated the development of high-throughput screening methods (HTS) for the systematic transformation of large amounts of biological/chemical data into an organized database of knowledge. Microfluidic systems are ideally suited for high-throughput biochemical experimentation since they offer high analytical throughput, consume minute quantities of expensive biological reagents, exhibit superior sensitivity and functionality compared to traditional micro-array techniques and can be integrated within complex experimental work flows. A range of basic biochemical and molecular biological operations have been transferred to chip-based microfluidic formats over the last decade, including gene sequencing, emulsion PCR, immunoassays, electrophoresis, cell-based assays, expression cloning and macromolecule blotting. In this review, we highlight some of the recent advances in the application of microfluidics to biochemistry and molecular biology.

High Throughput Implementation of RLS Algorithm Using Fewer Processing Elements

  • Niki, Takeo;Yamada, Rikita;Nishikawa, Kiyoshi;Kiya, Hitoshi
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.406-409
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    • 2000
  • This paper proposes a method that enables us to implement the recursive least squares (RLS) algorithm at, high throughput rate using fewer processing elements (PEs). It is known that the pipeline processing can provide a high throughput rate. But, pipelining is effective only when enough number of PEs are available. The proposed method achieves high throughput rate using a few PEs. The effectiveness of the proposed method is verified through simulations on programmable digital signal processors (in the following, DSP processors).

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Design on Main Mechanism of High Throughput Device for Enhancement of Oxidation and Recover Rate (산화속도 및 회수율 향상을 위한 고효율 장치 핵심 메커니즘 설계)

  • Kim, Y.H.;Park, B.S.;Jung, J.H.;Yoon, J.S.;Hwang, J.S.
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 2008.05a
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    • pp.473-476
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    • 2008
  • In this paper, we designed the main mechanism of high throughput device for rod-cuts of spent fuel. For this, we analyzed the mechanical methods(slitting, ball mill, roller straightening) and chemical methods(muffle furnace, rotary kiln). As the results, methods of ball drop and rotary drum for concepts design were selected in the analysis step. For enhancement of oxidation rate, we devised the blades on the reactor with mesh type. Also, for enhancement of decladding rate, we designed ball size and rotation reactor with mesh type and devised the vacuum system for fission products. Mechanisms of oxidation and recovery can simultaneously handle the rod-cuts of spent fuel and independently recover. The results of mechanism design can be used for scale-up of high throughput device.

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Hardware Design and Implementation of Block Encryption Algorithm ARIA for High Throughput (High Throughput을 위한 블록 암호 알고리즘 ARIA의 하드웨어 설계 및 구현)

  • Yoo, Heung-Ryol;Lee, Sun-Jong;Son, Yung-Deug
    • Journal of IKEEE
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    • v.22 no.1
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    • pp.104-109
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    • 2018
  • This paper presents a hardware design for the block encryption algorithm of ARIA which is used for standard in Korea. It presents a hardware-efficient design to increase the throughput for the ARIA algorithm using a high-speed pipeline architecture. We have used ROM for the S-box implementation. This approach aims to decrease the critical path delay of the encryption. In this paper, hardware was designed by VHDL, realized RTL level by Synplify which is synthesis tool and verified simulation by ModelSim. The ARIA algorithm is shown 68.3 MHz (Maximum operation frequency) to use Xilinx VertxE XCV Series device.

Throughput of Coded DS CDMA/Unslotted ALOHA Networks with Variable Length Data Traffic and Two User Classes in Rayleigh Fading FSMC Model

  • Tseng, Shu-Ming;Chiang, Li-Hsin;Wang, Yung-Chung
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.12
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    • pp.4324-4342
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    • 2014
  • Previous papers analyzed the throughput performance of the CDMA ALOHA system in Rayleigh fading channel, but they assume that the channel coefficient of Rayleigh fading was the same in the whole packet, which is not realistic. We recently proposed the finite-state Markov channel (FSMC) model to the throughput analysis of DS uncoded CDMA/unslotted ALOHA networks for fixed length data traffic in the mobile environment. We now propose the FSMC model to the throughput analysis of coded DS CDMA/unslotted ALOHA networks with variable length data traffic and one or two user classes in the mobile environment. The proposed DS CDMA/unslotted ALOHA wireless networks for two user classes with access control can maintain maximum throughput for the high priority user class under high message arrival per packet duration.

A Computationally Efficient Scheduling Algorithm Capable of Controlling Throughput-Fairness Tradeoff (계산이 효율적인 전송률-형평성 트레이드오프 제어 스케줄링 알고리즘)

  • Lee, Min;Oh, Seong-Keun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.2A
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    • pp.121-127
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    • 2010
  • In this paper, we propose a computationally efficient scheduling algorithm that can arbitrarily control the throughput-fairness tradeoff in a multiuser wireless communication environment. As a new scheduling criterion, we combine linearly two well-known scheduling criteria such as one of achieving the maximum sum throughput and the other of achieving the maximum fairness, so as to control the relative proportion of the throughput and the fairness according to a control factor. For linear combining two different criteria, their optimization directivenesses and the units should be unified first. To meet these requirements, we choose an instantaneous channel capacity as a scheduling criterion for maximizing the sum throughput and the average serving throughput for maximizing the fairness. Through a unified linear combining of two optimization objectives with the control factor, it can provide various throughput-fairness tradeoffs according to the control factors. For further simplification, we exploit a high signal-to-noise ratio (SNR) approximation of the instantaneous channel capacity. Through computer simulations, we evaluate the throughput and fairness performances of the proposed algorithm according to the control factors, assuming an independent Rayleigh fading multiuser channel. We also evaluate the proposed algorithm employing the high SNR approximation. From simulation results, we could see that the proposed algorithm can control arbitrarily the throughput-fairness performance between the performance of the scheduler aiming to the maximum sum throughput and that of the scheduler aiming to the maximum fairness, finally, we see that the high SNR approximation can give a satisfactory performance in this situation.