• Title/Summary/Keyword: high voltage stress

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A new interleaved high step up converter with low voltage stress on the main switches

  • Tohidi, Babak;Delshad, Majid;Saghafi, Hadi
    • Smart Structures and Systems
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    • v.26 no.4
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    • pp.521-531
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    • 2020
  • In this paper, a new interleaved high step-up converter with low voltage stress on the switches is proposed. In the proposed converter, soft switching is provided for all switches by just one auxiliary switch, which decreases the conduction loss of auxiliary circuit. Also, the auxiliary circuit is expanded on the converter with more input branches. In the converter all main switches operate under zero voltage switching condition and auxiliary switch operate under zero current switching condition. Because of the interleaved structure, the reliability of converter increases and input current ripples decreases. The clamp capacitor in the converter not only absorb the voltage spikes across the switch due to leakage inductance, but also improve voltage gain. The proposed converter is fully analyzed and to verify the theoretical analysis, a 100 W prototype was implemented. Also, to show the effectiveness of auxiliary circuit on conduction EMI, EMI of the proposed converter comprised with hard switching counterpart.

Low-Voltage-Stress AC-Linked Charge Equalizing System for Series-Connected VRLA Battery Strings

  • Karnjanapiboon, Charnyut;Jirasereeamornkul, Kamon;Monyakul, Veerapol
    • Journal of Power Electronics
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    • v.13 no.2
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    • pp.186-196
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    • 2013
  • This paper presents a low voltage-stress AC-linked charge equalizing system for balancing the energy in a serially connected, valve-regulated lead acid battery string using a modular converter that consists of multiple transformers coupled together. Each converter was coupled through an AC-linked bus to increase the overall energy transfer efficiency of the system and to eliminate the problem of the unbalanced charging of batteries. Previous solutions are based on centralized and modularized topologies. A centralized topology requires a redesign of the hardware and related components. It also faces a high voltage stress when the number of batteries is expanded. Modularized solutions use low-voltage-stress, double-stage, DC-linked topologies which leads to poor energy transfer efficiency. The proposed solution uses a low-voltage stress, AC-linked, modularized topology that makes adding more batteries easier. It also has a better energy transfer efficiency. To ensure that the charge equalization system operates smoothly and safely charges batteries, a small intelligent microcontroller was used in the control section. The efficiency of this charge equalization system is 85%, which is 21% better than other low-voltage-stress DC-linked charging techniques. The validity of this approach was confirmed by experimental results.

A Forward-Integrated Buck DC-DC Converter with Low Voltage Stress for High Step-Down Applications

  • Adivi, Maedeh Ghanbari;Yazdani, Mohammad Rouhollah
    • Journal of Power Electronics
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    • v.18 no.2
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    • pp.356-363
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    • 2018
  • The combination of a buck converter and a forward converter can be considered to accomplish a high step-down non-isolated converter. To decrease the insufficient step-down ratio of a regular buck converter and to distribute switch voltage stress, a forward-integrated buck (FIB) converter is proposed in this paper. The proposed interleaved DC-DC converter provides an additional step-down gain with the help of a forward converter. In addition to its simple structure, the transformer flux reset problem is solved and an additional magnetic core reset winding is not required. The operational principle and an analysis of the proposed FIB converter are presented and verified by experimental results obtained with a 240 W, 150 V/24 V prototype.

The Study of Reliability by SILC Characteristics in Silicon Oxides (SILC 특성에 의한 실리콘 산화막의 신뢰성 연구)

  • 강창수
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.17-20
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    • 2002
  • This study has been investigated that traps generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The charge state of the traps can easily be changed by application of low voltages after the stress high voltage. These trap generation involve either electron impact ionization processes or high field generation processes. It determined to the relative traps locations inside the oxides ranges from 113.4A to 814A with capacitor areas of 10$^{-3}$ $\textrm{cm}^2$ The oxide charge state of traps generated by the stress high voltage contain either a positive or negative charge.

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Trap distributions in high voltage stressed silicon oxides (고전계 인가 산화막의 트랩 분포)

  • 강창수
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.9 no.5
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    • pp.521-526
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    • 1999
  • It was investigated that traps were generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The charge state of the traps can easily be changed by application of low voltage after the stress high voltage. It determined to the relative traps locations inside the oxides ranges from 113.4$\AA$to 814$\AA$ with capacitor areas of $10^{-3}{$\mid$textrm}{cm}^2$. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The oxide charge state of traps generated by the stress high voltage contain either a positive or a negative charge.

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Filtering Techniques to Reduce the Transient Voltage of High Voltage Induction Motor on H-bridge cascaded 7- level Inverte (H-Bridge 7-레벨 인버터 구동시 고압 유도전동기에서 발생하는 과도전압 저감을 위한 필터기술)

  • Kwon, Young-Mok;Kim, Jae-Chul;Kim, Young-Sung;Lee, Yang-Jin
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2005.05a
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    • pp.47-50
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    • 2005
  • In this paper, we investigate a filtering technique to reduce the adverse effect of long motor leads on H-bridge cascaded 7-level inverter fed ac motor drive. The switching surge voltage becomes the major cause to occur the insulation failure by serious voltage stress in the stator winding of high voltage induction motor. However, the effect of switching surge appears un seriousin high voltage induction motor than low voltage induction motor. Consequently, we demonstrated that the filter connected to the motor terminals greatly reduces the transient voltage stress and ringing, moreover we show lowers the dv/dt of the inverter switching pulse. The results of simulation show the suppression of dv/dt and the reduced peak voltage at the motor end of a long cable.

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Analysis, Design and Implementation of a Soft Switching DC/DC Converter

  • Lin, Bor-Ren
    • Journal of Power Electronics
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    • v.13 no.1
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    • pp.20-30
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    • 2013
  • This paper presents a soft switching DC/DC converter for high voltage application. The interleaved pulse-width modulation (PWM) scheme is used to reduce the ripple current at the output capacitor and the size of output inductors. Two converter cells are connected in series at the high voltage side to reduce the voltage stresses of the active switches. Thus, the voltage stress of each switch is clamped at one half of the input voltage. On the other hand, the output sides of two converter cells are connected in parallel to achieve the load current sharing and reduce the current stress of output inductors. In each converter cell, a half-bridge converter with the asymmetrical PWM scheme is adopted to control power switches and to regulate the output voltage at a desired voltage level. Based on the resonant behavior by the output capacitance of power switches and the transformer leakage inductance, active switches can be turned on at zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. The current doubler rectifier is used at the secondary side to partially cancel ripple current. Therefore, the root-mean-square (rms) current at output capacitor is reduced. The proposed converter can be applied for high input voltage applications such as a three-phase 380V utility system. Finally, experiments based on a laboratory prototype with 960W (24V/40A) rated power are provided to demonstrate the performance of proposed converter.

The Dimmable Single-stage Asymmetrical LLC Resonant LED Driver with Low Voltage Stress Across Switching Devices

  • Kim, Seong-Ju;Kim, Young-Seok;Kim, Choon-Taek;Lee, Joon-Min;La, Jae-Du
    • Journal of Electrical Engineering and Technology
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    • v.10 no.5
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    • pp.2031-2039
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    • 2015
  • In the LED lighting industry, the dimming function in the LED lamp is required by demands of many consumers. To drive this LED lighting, various types of power converters have been applied. Among them, an LLC resonant converter could be applied for high power LED lighting because of its high efficiency and high power density, etc. The function of power factor correction (PFC) might be added to it. In this paper, a dimmable single-stage asymmetrical LLC resonant converter is proposed. The proposed converter performs both input-current harmonics reduction and PFC using the discontinuous conduction mode (DCM). Also, the lower voltage stress across switching devices as well as the zero voltage switching (ZVS) in switching devices is realized by the proposed topology. It can reduce cost and has high efficiency of the driver. In addition, the regulation of the output power by variable switching frequency can vary the brightness of a light. In the proposed converter, one of the attractive advantages doesn’t need any extra control circuits for the dimming function. To verify the performance of the proposed converter, simulation and experimental results from a 300W prototype are provided.

Hot-Carrier-Induced Degradation in Submicron MOS Transistors (Submicron MOS 트랜지스터의 뜨거운 운반자에 의한 노쇠현상)

  • 최병진;강광남
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.7
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    • pp.780-790
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    • 1988
  • We have studied the hot-carrier-induced degradation caused by the high channel electric field due to the decrease of the gate length of MOSFET used in VLSI. Under DC stress, the condition in which maximum substrate current occures gave the worst degradation. Under AC dynamic stress, other conditions, the pulse shape and the falling rate, gave enormous effects on the degradation phenomena, especially at 77K. Threshold voltage, transconductance, channel conductance and gate current were measured and compared under various stress conditions. The threshold voltage was almost completely recovered by hot-injection stress as a reverse-stress. But, the transconductance was rapidly degraded under hot-hole injection and recovered by sequential hot-electron stress. The Si-SiO2 interface state density was analyzed by a charge pumping technique and the charge pumping current showed the same trend as the threshold voltage shift in degradation process.

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Hot-Carrier Induced GIDL Characteristics of PMOSFETs under DC and Dynamic Stress (직류 및 교류스트레스 조건에서 발생된 Hot-Carrier가 PMOSFET의 누설전류에 미치는 영향)

  • 류동렬;이상돈;박종태;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.12
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    • pp.77-87
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    • 1993
  • PMOSFETs were studied on the effect of Hot-Carrier induced drain leakage current (Gate-Induced-Drain-Leakage). The result turned out that change in Vgl(drain voltage where 1pA/$\mu$m of drain leadage current flows) was largest in the Channel-Hot-Hole(CHH) injection condition and next was in dynamic stress and was smallest in electron trapping (Igmax) condition under various stress conditions. It was analyzed that if electron trapping occurrs in the overlap region of gate and drain(G/D), it reduces GIDL current due to increment of flat-band voltage(Vfb) and if CHH is injected, interface states(Nit) were generated and it increases GIDL current due to band-to-defect-tunneling(BTDT). Especially, under dynamic stress it was confirmed that increase in GIDL current will be high when electron injection was small and CHH injection was large. Therefore as applying to real circuit, low drain voltage GIDL(BTDT) was enhaced as large as CHH Region under various operating voltage, and it will affect the reliablity of the circuit.

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