• Title/Summary/Keyword: high speed video system

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Mechanisms of Convective and Boiling Heat Transfer Enhancement via Ultrasonic Vibration (초음파 진동에 의한 대류 및 비등 열전달 촉진 원리에 관한 연구)

  • Kim, Yi-Gu;Kim, Ho-Young;Kang, Seoung-Min;Kang, Byung-ha;Lee, Jin-Ho
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.27 no.5
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    • pp.612-619
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    • 2003
  • This work experimentally studies the fundamental mechanisms by which the ultrasonic vibration enhances convection and pool boiling heat transfer. A thin platinum wire is used as both a heat source and a temperature sensor. A high speed video imaging system is employed to observe the behavior of cavitation and thermal bubbles. It is found that when the liquid temperature is below its boiling point, cavitation takes place due to ultrasonic vibration while cavitation disappears when the liquid reaches the boiling point. Moreover, when the gas dissolved in liquid is removed by pre-degassing, the cavitation arises only locally. Depending on the liquid temperature, heat transfer rates in convection, subcooled boiling and saturated boiling regimes are examined. In convection heat transfer regime, fully agitated cavitation is the most efficient heat transfer enhancement mechanism. Subcooled boiling is most enhanced when tile local cavitation is induced after degassing. In saturated boiling regime, acoustic pressure is shown to be a dominant heat transfer enhancement mechanism.

The Analysis of Priority Output Queuing Model by Short Bus Contention Method (Short Bus contention 방식의 Priority Output Queuing Model의 분석)

  • Jeong, Yong-Ju
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.2
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    • pp.459-466
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    • 1999
  • I broadband ISDN every packet will show different result if it would be processed according to its usage by the server. That is, normal data won't show big differences if they would be processed at normal speed. But it will improve the quality of service to process some kinds of data - for example real time video or voice type data or some data for a bid to by something through the internet - more fast than the normal type data. solution for this problem was suggested - priority packets. But the analyses of them are under way. Son in this paper a switching system for an output queuing model in a single server was assumed and some packets were given priorities and analysed. And correlation, simulating real life situation, was given too. These packets were analysed through three cases, first packets having no correlation, second packets having only correlation and finally packets having priority three cases, first packets having no correlation, second packets having only correlation and finally packets having priority and correlation. The result showed that correlation doesn't affect the mean delay time and the high priority packets have improved mean delay time regardless of the arrival rate. Those packets were assumed to be fixed-sized like ATM fixed-sized cell and the contention strategy was assumed to be short bus contention method for the output queue, and the mean delay length and the maximum 버퍼 length not to lose any packets were analysed.

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Design and Implementation of High-Resolution Image Transmission Interface for Mobile Device (모바일 환경을 위한 맞춤형 서비스 유비쿼터스 영상전송 시스템의 설계)

  • Lee, Sang-Wook;Ahn, Yong-Beom;Kim, Eung-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.4
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    • pp.791-799
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    • 2008
  • An image recognition for surrounding conditions is very important in image transmission. In recently rears, as the information infrastructure is more general, the user-centered demands in which they want to identify by object's states image using wire or wireless environment have increased. However, existing mobile solution could be hard to expect high quality mage, because limitation of software processing according as network based on mobile terminal which has low band width supports software codec. To solve this weak point, this paper describes on hardware codec design based on MPEG-4 which is international video compression standard. Implemented system contains the embedded CPU for optimized design and it works high quality service as transmission speed and resolution in mobile circumstance.

Design and Implementation of ARIA Cryptic Algorithm (ARIA 암호 알고리듬의 하드웨어 설계 및 구현)

  • Park Jinsub;Yun Yeonsang;Kim Young-Dae;Yang Sangwoon;Chang Taejoo;You Younggap
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.4 s.334
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    • pp.29-36
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    • 2005
  • This paper presents the first hardware design of ARIA that KSA(Korea Standards Association) decided as the block encryption standard at Dec. 2004. The ARIA cryptographic algorithm has an efficient involution SPN (Substitution Permutation Network) and is immune to known attacks. The proposed ARIA design based on 1 cycle/round include a dual port ROM to reduce a size of circuit md a high speed round key generator with barrel rotator. ARIA design proposed is implemented with Xilinx VirtexE-1600 FPGA. Throughput is 437 Mbps using 1,491 slices and 16 RAM blocks. To demonstrate the ARIA system operation, we developed a security system cyphering video data of communication though Internet. ARIA addresses applications with high-throughput like data storage and internet security protocol (IPSec and TLS) as well as IC cards.

The Motion Estimator Implementation with Efficient Structure for Full Search Algorithm of Variable Block Size (다양한 블록 크기의 전역 탐색 알고리즘을 위한 효율적인 구조를 갖는 움직임 추정기 설계)

  • Hwang, Jong-Hee;Choe, Yoon-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.66-76
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    • 2009
  • The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.

Simulation Analysis for Verifying an Implementation Method of Higher-performed Packet Routing

  • Park, Jaewoo;Lim, Seong-Yong;Lee, Kyou-Ho
    • Proceedings of the Korea Society for Simulation Conference
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    • 2001.10a
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    • pp.440-443
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    • 2001
  • As inter-network traffics grows rapidly, the router systems as a network component becomes to be capable of not only wire-speed packet processing but also plentiful programmability for quality services. A network processor technology is widely used to achieve such capabilities in the high-end router. Although providing two such capabilities, the network processor can't support a deep packet processing at nominal wire-speed. Considering QoS may result in performance degradation of processing packet. In order to achieve foster processing, one chipset of network processor is occasionally not enough. Using more than one urges to consider a problem that is, for instance, an out-of-order delivery of packets. This problem can be serious in some applications such as voice over IP and video services, which assume that packets arrive in order. It is required to develop an effective packet processing mechanism leer using more than one network processors in parallel in one linecard unit of the router system. Simulation analysis is also needed for verifying the mechanism. We propose the packet processing mechanism consisting of more than two NPs in parallel. In this mechanism, we use a load-balancing algorithm that distributes the packet traffic load evenly and keeps the sequence, and then verify the algorithm with simulation analysis. As a simulation tool, we use DEVSim++, which is a DEVS formalism-based hierarchical discrete-event simulation environment developed by KAIST. In this paper, we are going to show not only applicability of the DEVS formalism to hardware modeling and simulation but also predictability of performance of the load balancer when implemented with FPGA.

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The Kinematic Characteristics of Javelin in Korean Male Javelin Throwers Following Rank (한국 남자 창던지기 선수들의 순위별 창의 운동학적 특성)

  • Kim, Tae-Sam;Ryu, Ji-Seon;Park, Jae-Myoung
    • Korean Journal of Applied Biomechanics
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    • v.23 no.2
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    • pp.99-108
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    • 2013
  • The purpose of this study was to analyze the kinematic characteristics of javelin to compare the characteristics between world elite athletes and local male athletes. The subjects selected 9 athletes out of total 13 athletes recorded more than 65 m in the preliminary and main competition participated in the 93rd National Sports Festival held in 2012. Three-Dimensional motion analysis using a system of 4 video cameras(Sony HXR-MC2000) at a sampling frequency of 60 fields/s was performed for this study. The Kwon3D 3.1 was used to obtain the three dimensional coordinates about the top, grip, end of javelin. And the kinematic factors of javelin calculated using Matlab2009a program. The resultant speed of javelin that affects directly to the record of performance showed 26.08 m/s indicated lower speed of about 2-3 m/s than world elite athletes. The release point appeared to have been made at the high of $1.79{\pm}0.07$ m of 99.8% of the height of the athletes. In terms of release angle, it was indicated average $33.0{\pm}3.81^{\circ}$ lower release angle compared to the world elite athletes. The attitude angle(up & down tilt angle, X axis) related to javelin indicated average $38.5{\pm}4.96^{\circ}$, its related attack angle average $5.5{\pm}5.11^{\circ}$, and yaw angle(sideslip, side attack angle) average $15.7{\pm}8.48^{\circ}$.

A Calculation of Joint Torque for Triple Segmental System in Golf Swing (골프스윙 3분절 시스템의 Joint Torque의 산출)

  • Lim, Jung;Hwang, In-Seong
    • Korean Journal of Applied Biomechanics
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    • v.16 no.4
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    • pp.105-113
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    • 2006
  • The purpose of this study was to analyze the joint torque of triple segmental system in golf driver swing. For this purpose, joint torque were calculated. In order to determine the load on the lumbar region, a triple segmental system was set for wrist, left shoulder and lumbar, torque working on the lumbar region were estimated. For this study, a total of 7 professional golfers were sampled, and then, their driver swings were recorded with two high-speed digital video cameras (180 frames/sec.) to be synthesized into 3-dimensional images and coordinated. Then, Eular's equation was used to produce some kinematic data, which were used to calculate joint torque with Newton's function. All data were calculated using LabVIEW 6.1 graphic program. The results of this study can be summarized as follows; It was found that the joint torque was generated in the direction opposite the target on wrist and shoulder during down swing, while in the direction towards the target on the lumbar region. During impact and release, the torque on the wrist joint was converted from the direction opposite the target to the direction towards the target, while the torque on the lumbar region was generated vice versa. The joints on the club-arm-shoulder were generated in the opposite direction at the beginning of down swing when the torque on the thorax-pelvis began to be generated, and then, the torque on the thorax-pelvis began to lower, while that on the club-arm-shoulder began to increase. Thus, a rapid decrease of the torque on the lumbar region linked to the low trunk acted to increase moment and joint torque on the arm-club region.

Link Design of VSAT Communication System for Low Speed Data Transmission (저속데이타 전송용 VSAT 통신시스템의 링크설계)

  • 장대익;최재익;김덕년
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.7
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    • pp.1213-1223
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    • 1994
  • VSATs(Very Small Aperture Terminals) have introduced new concepts in satellite business communications and are typically used in a star network configuration to provide information directly to the user`s premise. The characteristics of this system are low earth station costs, easy in stallation, compact, and very high flexibility for a varierty of applications (Credit Checks, Electronic Mail, Video Conferencing, Reservation System, Database Inquires, Order Entry, etc.). So, the requests of VSAT service have considerably enlarged. The link design of a VSAT network using Korea Sat. is discussed in this paper. This paper is intended to collect in a convient way the principle formula and reference data necessary to make overall performance calcurations and to calcurate antenna size. HPA power size and link margin of earth stations for satellite communications systems. Generally, because the antenna size of the Hub station in the VSAT system is bigger than the Remote station, the method of power allocations of inbound and outbound carriers is utilized in this paper. The size of Hub station and Remote station are assumed to be 3.7m and 1.2m. respectively.

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A Study on the Disk Array Parameters for VOD Servers (VOD 서버를 위한 디스크 배열 파라미터에 관한 연구)

  • Park, Jung-Yeon;Ahn, Byoung-Chul;Kim, Jung-Doo
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.11
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    • pp.2662-2670
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    • 1997
  • High speed network makes possible to transfer not only the test data but also multimedia data such as audio, image, and moving pictures and etc. In a multimedia applications, as a multimedia storage system, it is necessary to use a disk array to store and retrieve data by real time. It is important feature to various disk array parameters as a storage system on a real VOD system, such as configuration method of each disks and allocation method of multimedia data. In this paper, various parameters for the disk array are decided to be used for the video-on-demand system application by simulations in two ways. The real and simulation measurement are compared and analyzed on the performance. Simulation results shows that RAID level 5 and 256KB as striping unit and 185KB as data requests size per seconds are suitable parameter for the disk array architecture which provides MPEG-1 files with a rate of 1.5Mbps in two measurements of real and simulation.

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