• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.23 no.3
• /
• pp.190-193
• /
• 2010

Various power semiconductor devices have been developed and evolved since 1950s. Among them, IGBT is the most developed power semiconductor device which has high breakdown voltage, high current conduction and suitable switching speed which perform trade-offs between each other. In other words, there are trade-offs between a breakdown voltage and on-state voltage drop, and between on-state voltage drop and turn-off time. In this paper, the new structure is proposed to improve a trade-off between a breakdown voltage and on-state voltage drop. The proposed structure has a trench collector and this trench collector induces an accumulation layer at the bottom of an n-drift region during off-state. And this accumulation layer prevents expansion of depletion layer so that trapezoidal electric field distribution is performed in the n-drift region. As a result of this, breakdown voltage is increased without increasing on-state voltage drop. The electrical characteristics of the proposed IGBT is analyzed and optimized by using representative device simulator, TSUPREM4 and MEDICI. After optimization, the electrical characteristics of the proposed IGBT is compared with NPT IGBT which have the same device thickness. As a result of this, it can be confirmed that the proposed structure increases the breakdown voltage of 800 V than that of the conventional NPT IGBT without increasing the on-state voltage drop.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.39 no.7
• /
• pp.1-11
• /
• 2002

This paper proposes that an efficient routing entry sending method between routing controller FE. based on this method, we organize IP VPN support method based on MPLS network and design MPLS-VPN service control module, MPLS-VPN processing, VPN group configuration and LSP setup processing. We evaluate the performance about the VPN based on proposed MPLS, at the result of evaluation. We figure out that based on proposed IPC method, lost packets number reduces and delay increases more slowly in case of VPN based on MPLS comparing with the VPN based on ATM which has rapid delay increasement. Therefore we confirm that the VPN based on MPLS has high speed of packet processing and high utilization of buffers through the performance evaluation.

• Journal of the Korean Society for Railway
• /
• v.9 no.6 s.37
• /
• pp.761-765
• /
• 2006

At present, harmonic currents cause serious problems in power conversion system using the semiconductor switching device. Also some of the conversion system provokes harmonic currents against to the main power supply system and causes hindrances for the system. Main power impedance of the traditional LC passive filter method, influences on the filter characteristics and amplifies the harmonics when resonance phenomenon is occurred. And the traditional existing 2 level inverter systems show the limit in capacity of voltage and current in case of occurring sudden load change. So, to solve this problem active filter which uses cascaded H-bridge multi level inverter has been designed and ex-filter system circuits were totally investigated. With multi level active filtering system not only the size of filter but also the size of filter for transformer can be reduced by half and so as to the weight, while the capacity of inverter can be double sized and wave forms can be compensated exactly and precisely. Also by the benefit of the increase in rating capacity, the various currents owing to the load fluctuation can be dealt more steadily. In order to simulate the wave form of harmonics based on the measured data on the AC 25kV high speed Domestic Commercial railway, it was simulated with PSCAD/EMTDC and PSIM. Based on the results of this demonstration, the power supply system and inverter system would be more stable and also promoting its efficiency.

• Nuclear Engineering and Technology
• /
• v.44 no.7
• /
• pp.727-734
• /
• 2012

A new advanced safety feature of DVI+ (Direct Vessel Injection Plus) for the APR+ (Advanced Power Reactor Plus), to mitigate the ECC (Emergency Core Cooling) bypass fraction and to prevent switching an ECC outlet to a break flow inlet during a DVI line break, is presented for an advanced DVI system. In the current DVI system, the ECC water injected into the downcomer is easily shifted to the broken cold leg by a high steam cross flow which comes from the intact cold legs during the late reflood phase of a LBLOCA (Large Break Loss Of Coolant Accident)For the new DVI+ system, an ECBD (Emergency Core Barrel Duct) is installed on the outside of a core barrel cylinder. The ECBD has a gap (From the core barrel wall to the ECBD inner wall to the radial direction) of 3/25~7/25 of the downcomer annulus gap. The DVI nozzle and the ECBD are only connected by the ECC water jet, which is called a hydrodynamic water bridge, during the ECC injection period. Otherwise these two components are disconnected from each other without any pipes inside the downcomer. The ECBD is an ECC downward isolation flow sub-channel which protects the ECC water from the high speed steam crossflow in the downcomer annulus during a LOCA event. The injected ECC water flows downward into the lower downcomer through the ECBD without a strong entrainment to a steam cross flow. The outer downcomer annulus of the ECBD is the major steam flow zone coming from the intact cold leg during a LBLOCA. During a DVI line break, the separated DVI nozzle and ECBD have the effect of preventing the level of the cooling water from being lowered in the downcomer due to an inlet-outlet reverse phenomenon at the lowest position of the outlet of the ECBD.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.174-174
• /
• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• Journal of Electrical Engineering and Technology
• /
• v.9 no.2
• /
• pp.686-694
• /
• 2014

A power semiconductor device, usually used as a switch or rectifier, is very significant in the modern power industry. The power semiconductor, in terms of its physical properties, requires a high breakdown voltage to turn off, a low on-state resistance to reduce static loss, and a fast switching speed to reduce dynamic loss. Among those parameters, the breakdown voltage and on-state resistance rely on the doping concentration of the drift region in the power semiconductor, this effect can be more important for a higher voltage device. Although the low doping concentration in the drift region increases the breakdown voltage, the on-state resistance that is increased along with it makes the static loss characteristic deteriorate. On the other hand, although the high doping concentration in the drift region reduces on-state resistance, the breakdown voltage is decreased, which limits the scope of its applications. This addresses the fact that breakdown voltage and on-state resistance are in a trade-off relationship with a parameter of the doping concentration in the drift region. Such a trade-off relationship is a hindrance to the development of power semiconductor devices that have idealistic characteristics. In this study, a novel structure is proposed for the Insulated Gate Bipolar Transistor (IGBT) device that uses conductivity modulation, which makes it possible to increase the breakdown voltage without changing the on-state resistance through use of a P-floating layer. More specifically in the proposed IGBT structure, a P-floating layer was inserted into the drift region, which results in an alleviation of the trade-off relationship between the on-state resistance and the breakdown voltage. The increase of breakdown voltage in the proposed IGBT structure has been analyzed both theoretically and through simulations, and it is verified through measurement of actual samples.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.14 no.5
• /
• pp.927-934
• /
• 2019

Recently, mobile devices have evolved into small computers with various functions according to user requirements. Careful attention must be paid to the design of the power supply network for the stable operation of the application processor (AP), the wireless communication modem, the high performance camera, and the various interfaces of the mobile device to implement various functions of the mobile device. In this paper, we analyzed and verified the method of optimizing the design parameters such as the position, capacity, and number of decoupling capacitors to meet the target impedance required by the driver IC chip to ensure the stability of the power supply network of mobile devices that should be designed as wiring type due to mounting density limitation. The proposed wired power supply network design method can be applied to various applications including high-speed signal transmission line in addition to mobile applications.

• Journal of IKEEE
• /
• v.26 no.1
• /
• pp.95-103
• /
• 2022

In this paper, the efficiency of a sensorless method with square-wave injection for a low-cost inverter, so called B4 inverter is presented. This inverter comprises only 4 switches to reduce system cost. It is distinguished from the conventional B6 inverter that has 6 of switching elements. The B4 inverter, injected a 1 kHz of harmonic wave, has been modelled using the functions and library in Matlab/Simulink. This paper described each component of sensorless algorithm. Among them, the Notch Filter is used to extract the harmonic component of the phase current and a second-order low-pass filter was used to reduce the ripple of the estimated speed. It is shown through simulation that the rotor angle of a permanent magnet synchronous motor is detected by multiplying the current waveform extracted using the notch filter by the harmonic voltage. The feasibility of the proposed method is shown through Simulink simulation.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.21 no.8
• /
• pp.18-25
• /
• 2020

With the development of water internet technology, data communication between objects is expanding. Research related to data communication technology between vehicles that incorporates related technologies into vehicles has been actively conducted. For data communication between mobile terminals, data stability, reliability, and real-time performance must be guaranteed. The 5 GHz Wi-Fi band, which is advantageous in bandwidth, communications speed, and wireless saturation of the wireless network, was selected as the data communications network between vehicles. This study analyzes how to design and implement a 5 GHz Wi-Fi network in a vehicle network. Considering the characteristics of the mobile communication terminal device, a continuous variable communications structure is proposed to enable high-speed data switching. We simplify the access point access procedure to reduce the latency between wireless terminals. By limiting the Transmission Control Protocol Internet Protocol (TCP/IP)-based Dynamic Host Configuration Protocol (DHCP) server function and implementing it in a broadcast transmission protocol method, communication delay between terminal devices is improved. Compared to the general commercial Wi-Fi communication method, the connection operation and response speed have been improved by five seconds or more. Utilizing this method can be applied to various types of event data communication between vehicles. It can also be extended to wireless data-based intelligent road networks and systems for autonomous driving.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.1
• /
• pp.53-60
• /
• 2004

This work describes a l0b 150 MSample/s CMOS pipelined A/D converter (ADC) based on advanced bootsuapping techniques for higher input bandwidth than a sampling rate. The proposed ADC adopts a typical multi-step pipelined architecture, employs the merged-capacitor switching technique which improves sampling rate and resolution reducing by $50\%$ the number of unit capacitors used in the multiplying digital-to-analog converter. On-chip current and voltage references for high-speed driving capability of R & C loads and on-chip decimator circuits for high-speed testability are implemented with on-chip decoupling capacitors. The proposed AU is fabricated in a 0.18 um 1P6M CMOS technology. The measured differential and integral nonlinearities are within $-0.56{\~}+0.69$ LSB and $-1.50{\~}+0.68$ LSB, respectively. The prototype ADC shows the signal-to-noise-and-distortion ratio (SNDR) of 52 dB at 150 MSample/s. The active chip area is 2.2 mm2 (= 1.4 mm ${\times}$ 1.6 mm) and the chip consumes 123 mW at 150 MSample/s.