• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.164-169
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• 2005

In this paper, the high efficiency Doherty power amplifier using adaptive bias technique has been designed and realized for 2.3GHz Wibro applications. The RF performances of the Doherty power amplifier using adaptive bias technique have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with adaptive bias technique has been 36.6% at 34.0dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

• ETRI Journal
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• v.34 no.6
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• pp.885-891
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• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

• Journal of Navigation and Port Research
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• v.27 no.2
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• pp.209-215
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• 2003

In this paper. We tested and fabricated the error amplifier for the 15 Watt linear power amplifier for the IMT-2000 baseband station. The error amplifier was comprised of subtractor for detecting intermodulation distortion, variable attenuator for control amplitude, variable phase shifter for control phase, low power amplifier and high power amplifier. This component was designed on the RO4350 substrate and integrated the aluminum case with active biasing circuit. For suppression of spurious, the through capacitance was used. The characteristics of error amplifier measured up to 45 dB gain, $\pm$0.66 dB gain flatness and -15 dB input return loss. Results of application to the 15 Watt feedforward Linear Power Amplifier, the error amplifier improved with 27 dB cancellation from 34 dBc to 61 dBc IM$_3$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.2
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• pp.174-180
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• 2008

The pulsed amplifier which switches the main supply voltage of RF amplifier according to input pulse signal has good efficiency and low noise level between pulses. And it has simple structure because it doesn't need a pulse modulator at input port. The pulsed amplifier using the conventional switching circuit has slow fall time compared to rise time. We proposed the novel switching circuit for improving the fall time of pulsed amplifier The proposed switching circuit is implemented by replacing FET of conventional circuit with BJT. As a result of appling this circuit to RF pulsed amplifier, the rise and fall time are 5.7 ns and 21.9 ns at 27 dBm output power, respectively.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.9 no.5
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• pp.72-79
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• 2010

In this paper, we describe the design and implementation of a high efficiency Doherty power amplifier using gallium nitride (GaN) high-electron mobility transistor (HEMT). The carrier and peaking amplifiers of the proposed Doherty power amplifier consist of the switching-mode Class-E power amplifiers. The test conditions are a duty of 10% and a pulse width of $100\;{\mu}s$ and pulse repetition frequency (PRF) of 1 kHz for a S-band radar application. A RF performance peak PAE of 64% with drain efficiency of 80.6%, at 6 dB output back-off point from saturated output power of 45.5 dBm, was obtained at 2.85 GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.9
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• pp.44-50
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• 2002

Recently, a envelope tracking(ET) amplifier that improves efficiency by changing of the bias according to the RF input level is presented to use for a high power amplifier of cellular radio handset using CDMA. The input and the output impedances of the ET amplifier may be varied by changing of the bias of the amplifier, and it makes the amplifier having low gain, low efficiency, and high input and output VSWR. In order to improve the input and the output mismatch of the amplifier, in this paper, two types of ET amplifier are suggested. In case of an ET amplifier using varactor diode, in experimentation, gain is improved about 7dB and the power consumption of the amplifier is better about 60% than that of the conventional amplifier. In case of a base voltage controlled ET amplifier, the gain and power consumption of the amplifier is improved about 9dB and 40% than those of the conventional amplifier, respectively.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.261-264
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• 2004

In this paper, we identify the memory effect of high power(125W) laterally diffused metal oxide-semiconductor(LDMOS) RF Power Amplifier(PA) by two tone IMD measurement. We measure two tone IMD by changing the tone spacing and the power level. Different asymmetric IMD is founded at different center frequency measurements. We propose the Tapped Delay Line-Neural Network(TDNN) technique as the modeling method of LDMOS PA based on two tone IMD data. TDNN's modeling accuracy is highly reasonable compared to the memoryless adaptive modeling method.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1205-1214
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• 2013

Recently spaceborne SAR systems are increasing image resolution and frequency. As a high quality image resolution, the wider bandwidth is required and a wideband signal generator with RF component is very complicated and RF impairments of device is increased. Therefore, it is very important to improve performance by reducing these errors. In this study, the transmission signal of the wideband signal generator is applied to the phase noise, IQ imbalance, ripple gain, nonlinear model of high power amplifier. And we define possible structures of wideband signal generator and measure the PSLR and ISLR for the performance assesment. Also, we extract error of the amplitude and phase from the waveform and use a quadratic polynomial curve fitting and examine the performance change due to nonlinear device. Finally, we apply a high power amplifier predistortion method for non-linear error compensation. And we confirm that distortion in the output of the amplifier by intermodulation component is decreased by 15 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.1
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• pp.76-79
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• 2016

This paper describes the successful development and the performance of X-band 50 W pulsed power amplifier using a 50 W GaN-on-SiC high electron mobility transistor. The GaN HEMT with a gate length of $0.25{\mu}m$ and a total gate width of 12 mm were fabricated. The X-band pulsed power amplifier exhibited an output power of 50 W with a power gain of 6 dB in a frequency range of 9.2~9.5 GHz. It also shows a maximum output power density of 4.16 W/mm. This 50 W GaN HEMT and X-band 50 W pulsed power amplifier are suitable for the radar systems and related applications in X-band.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.98-104
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• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.