• Title/Summary/Keyword: high performance wire

Search Result 328, Processing Time 0.026 seconds

Performance analysis of campus wireless LAN in outdoor environment (실외환경에서 캠퍼스무선랜의 성능분석)

  • Kang Min-soo;Kim Myeong-hwan;Park Yeoun-sik
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.9 no.4
    • /
    • pp.753-757
    • /
    • 2005
  • Wireless LAN was developed by alternative of LAN and because establishment was easy, have used into special field and special expenditure. Recently, Standard and a technology developed by leaps and bounds. Present is used into purpose of the Building to Building or wide connection etc. and relay of the high speed Internet and usage of picture communication that require multimedia band width. Specially, campus wireless LAM is thought that must secure radius $100\;\~\;200\;m$ dimension at the minimum 10Mbps speed as Internet transit trunk. But, there is difference as degressive here. In this paper, wireless LAN measured for effectiveness proof as Internet transit trunk in actuality utilization environment. Proved that should compose IEEE802.11b as AP more than minimum 3 when compose network to base as measuring result. Hereafter, there is the purpose that achieve performance evaluation of wireless UM in marine environment.

High-speed W Address Lookup using Balanced Multi-way Trees (균형 다중 트리를 이용한 고속 IP 어드레스 검색 기법)

  • Kim, Won-Iung;Lee, Bo-Mi;Lim, Hye-Sook
    • Journal of KIISE:Information Networking
    • /
    • v.32 no.3
    • /
    • pp.427-432
    • /
    • 2005
  • Packet arrival rates in internet routers have been dramatically increased due to the advance of link technologies, and hence wire-speed packet processing in Internet routers becomes more challenging. As IP address lookup is one of the most essential functions for packet processing, algorithm and architectures for efficient IP address lookup have been widely studied. In this paper, we Propose an efficient I address lookup architecture which shows yeW good Performance in search speed while requires a single small-size memory The proposed architecture is based on multi-way tree structure which performs comparisons of multiple prefixes by one memory access. Performance evaluation results show that the proposed architecture requires a 280kByte SRAM to store about 40000 prefix samples and an address lookup is achieved by 5.9 memory accesses in average.

Two-dimensional Binary Search Tree for Packet Classification at Internet Routers (인터넷 라우터에서의 패킷 분류를 위한 2차원 이진 검색 트리)

  • Lee, Goeun;Lim, Hyesook
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.6
    • /
    • pp.21-31
    • /
    • 2015
  • The Internet users want to get real-time services for various multi-media applications. Network traffic rate has been rapidly increased, and data amounts that the Internet has to carry have been exponentially increased. A packet is the basic unit in transferring data at the Internet, and packet classification is one of the most challenging functionalities that routers should perform at wire-speed. Among various known packet classification algorithms, area-based quad-trie (AQT) algorithm is one of the efficient algorithms which can lookup five header fields simultaneously. As a representative space decomposition algorithm, the AQT requires a small amount of memory in storing classification rules, but it does not provide high-speed classification performance. In this paper, we propose a new packet classification algorithm by applying a binary search for the codewords of the AQT to overcome the issue of the AQT. Throughout simulation, it is shown that the proposed algorithm provides a better performance than the AQT in the number of rule comparisons with each input packet.

A New R-IPC Protocol for a High-speed Router System to Improve the System Performance (고속 대용량 라우터의 성능 향상을 위한 R-IPC프로토콜 성능분석)

  • 김수동;조경록
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.8 no.6
    • /
    • pp.1096-1101
    • /
    • 2004
  • By a tremendous expansion of Internet users, there's a number effects that cause the phenomenon of bottlenecked switching packets from routers. In order to tear down this problem, distributed system is applicable to almost every highly performed router systems. The main processor of distributed system, which manages routing table, commands IPC to delivering the forwarding table line processor that eases functionalities of the router. This makes the system having wired-speed forwarding function based on the hardware so that the performance of the network can be enhanced. Therefore, IPC, which assign a part of router, is necessary to exchange data smoothly and the constitution of IPC using Ethernet is widely adapted as a method for saving investment. In this paper, R-IPC mechanism improve the packet-processing rate over 10% through changed from defect of conventional Ethernet IPC, that is, 2 layer processing to TCP/IP or UDP/ IP into 1 layer processing for efficient packet forwarding.

Overview on Flip Chip Technology for RF Application (RF 응용을 위한 플립칩 기술)

  • 이영민
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.6 no.4
    • /
    • pp.61-71
    • /
    • 1999
  • The recent trend toward higher frequencies, miniaturization and lower-cost in wireless communication equipment is demanding high density packaging technologies such flip chip interconnection and multichip module(MCM) as a substitute of conventional plastic package. With analyzing the recently reported research results of the RF flip chip, this paper presents the technical issues and advantages of RF flip chip and suggest the flip chip technologies suitable for the development stage. At first, most of RF flip chips are designed in a coplanar waveguide line instead of microstrip in order to achieve better electrical performance and to avoid the interaction with a substrate. Secondly, eliminating wafer back-side grinding, via formation, and back-side metallization enables the manufacturing cost to be reduced. Finally, the electrical performance of flip chip bonding is much better than that of plastic package and the flip chip interconnection is more suitable for Transmit/Receiver modules at higher frequency. However, the characterization of CPW designed RF flip chip must be thoroughly studied and the Au stud bump bonding shall be suggested at the earlier stage of RF flip chip development.

  • PDF

Implementation of High Performance TCP Proxy Logic against TCP Flooding Attack on Network Interface Card (TCP 플러딩 공격 방어를 위한 네트워크 인터페이스용 고성능 TCP 프락시 제어 로직 구현)

  • Kim, Byoung-Koo;Kim, Ik-Kyun;Kim, Dae-Won;Oh, Jin-Tae;Jang, Jong-Soo;Chung, Tai-Myoung
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.21 no.2
    • /
    • pp.119-129
    • /
    • 2011
  • TCP-related Flooding attacks still dominate Distributed Denial of Service Attack. It is a great challenge to accurately detect the TCP flood attack in hish speed network. In this paper, we propose the NIC_Cookie logic implementation, which is a kind of security offload engine against TCP-related DDoS attacks, on network interface card. NIC_Cookie has robustness against DDoS attack itself and it is independent on server OS and external network configuration. It supports not IP-based response method but packet-level response, therefore it can handle attacks of NAT-based user group. We evaluate that the latency time of NIC_Cookie logics is $7{\times}10^{-6}$ seconds and we show 2Gbps wire-speed performance through a benchmark test.

Manipulator Equipped with Counterbalance Mechanism Based on Gear Unit (기어유닛 기반 중력보상장치를 갖는 머니퓰레이터)

  • Kang, In Ho;Kim, Hwi Su;Song, Jae-Bok;Lee, Hyun Soo;Chang, In Sung
    • Transactions of the Korean Society of Mechanical Engineers A
    • /
    • v.38 no.3
    • /
    • pp.289-294
    • /
    • 2014
  • Industrial manipulators are usually heavy given the payloads they carry. Therefore, they require high-capacity servomotors and speed reducers, which leads to high costs. However, if manipulator weight could be compensated for using a counterbalance mechanism, the motors' and speed reducers' capacities could be minimized substantially. However, it is usually difficult to assure durability and reliability with the conventional wire-based counterbalance mechanism. Therefore, a more robust gear- and roller-based counterbalance mechanism is proposed in this study. A manipulator was developed using this mechanism; this manipulator maintains its performance even when using motors and reducers of lower capacities. The results of various simulations and experiments verified that the proposed mechanism provides the torque required to compensate for gravitational torque in any configuration and minimizes the torque required for supporting a large payload.

Frequency Characteristics for Micro-scale SMD RE Chip Inductors of Solenoid-Type (Solenoid 형태의 초소형 SMD RF 칩 인덕터에 대한 주파수 특성)

  • Kim, Jae-Wook
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.8 no.3
    • /
    • pp.454-459
    • /
    • 2007
  • In this work, micro-scale, high-performance solenoid-type RF chip inductors utilizing amorphous $Al_2O_3$ core material were investigated. The size of the chip inductors was $0.86{\times}0.46{\times}0.45mm^3$ and copper(Cu) wire with $27{\mu}m$ diameter was used as the coil. High frequency characteristics of the inductance(L), quality factor(Q), impedance(Z), and equivalent circuit parameters of the RE chip inductors were measured and analyzed using an RF impedance/material analyzer(HP4291B with HP16193A test fixture). It was observed that the RF chip inductors with the number of turns of 9 to 12 have the inductance of 21 to 34nH and exhibit the self-resonant frequency(SRF) of 5.7 to 3.7GHz. The SRF of inductors decreases with increasing the inductance and inductors have the quality factor of 38 to 49 in the frequency range of 900MHz to 1,7GHz.

  • PDF

Design and analysis of a free-piston stirling engine for space nuclear power reactor

  • Dai, Zhiwen;Wang, Chenglong;Zhang, Dalin;Tian, Wenxi;Qiu, Suizheng;Su, G.H.
    • Nuclear Engineering and Technology
    • /
    • v.53 no.2
    • /
    • pp.637-646
    • /
    • 2021
  • The free-piston Stirling engine (FPSE) has been widely used in aerospace owing to its advantages of high efficiency, high reliability, and self-starting ability. In this paper, a 20-kW FPSE is proposed by analyzing the requirements of space nuclear power reactor. A code was developed based on an improved simple analysis method to evaluate the performance of the proposed FPSE. The code is benchmarked with experimental data, and the maximum relative error of the output power is 17.1%. Numerical results show that the output power is 21 kW, which satisfies the design requirements. The results show that: a) reducing the pressure shell's thickness can improve the output power significantly; b) the system efficiency increases with the wire porosity, while the growth of system efficiency decreases when the porosity is higher than 80%, and system efficiency exhibits a linear relationship with the temperatures of the cold and hot sides; c) the system efficiency increases with the compression ratio; the compression ratio increases by 16.7% while the system efficiency increases by 42%. This study can provide valuable theoretical support for the design and analysis of FPSEs for space nuclear power reactors.

Dynamic Characteristic of the Seismic Performance of Uninterruptible Power Supply with Combined Isolator Using Shaking Table Test (복합면진장치를 적용한 무정전전원장치의 1축 진동대실험 기반 동적특성 분석)

  • Lee, Ji-Eon;Lee, Seung-Jae;Park, Won-Il;Choi, Kyoung-Kyu
    • Journal of the Korea institute for structural maintenance and inspection
    • /
    • v.26 no.1
    • /
    • pp.19-28
    • /
    • 2022
  • In this study, three types of combined isolator consisting of High Damping Rubber Bearing (HDRB) and wire isolator were developed for Uninterruptible Power Supply system (UPS). The dynamic characteristics of the combined isolator were investigated through one-axis shaking table test. The input acceleration were generated in accordance with ICC-ES AC156 code. Scale factors of the input acceleration were designed to be 0.5-2 times the required response spectrum defined in ICC-ES AC156. Based on the test results, damage and dynamic characteristics of the UPS were investigated: including natural frequency, damping ratio, acceleration time history response, dynamic amplification factor and relative displacement. Based on that, it was found that the combined isolator developed in this study could improve the seismic behavior of the UPS, in particular, the response acceleration.