• 한국콘크리트학회:학술대회논문집
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• 한국콘크리트학회 2005년도 봄학술 발표회 논문집(I)
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• pp.275-278
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• 2005

High performance fiber reinforced cement composites(HPFRCCs) is a class of high ductile fiber reinforced cementitious composites developed for applications in the sensitive construction industry. HPFRCCs has undergone major evolution in both materials development and the range of emerging applications. This paper is to evaluate structural strengthening performance of LRCF(Lightly reinforced concrete frame) using the HPFRCCs. The experimental results, as expected, show that the crack load, yield load, and limited load are superior for specimen with HPFRCCs infill wall due to crosslink effect of fibers in concrete.

• 한국군사과학기술학회지
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• 제7권2호
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• pp.13-21
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• 2004

GPS is widely used in various applications since GPS receivers are capable of measuring precise position and velocity in any weather condition for a relatively low cost. However, GPS requires more than four simultaneously visible GPS satellites for optimal performance. In high-motion, high-attitude-changing applications, there exist some situations where less than four satellites are visible or where the dilution of precision (DOP) is high. In this paper, we propose a simulation algorithm that predicts the performance of GPS navigation according to changes in vehicle attitude. We have compared simulation results with experimental results, where simulation results of the proposed algorithm are shown to closely match actual experimental data. This algorithm could be used to predict GPS navigational performance and to determine optimal GPS antenna position.

• 대한임베디드공학회논문지
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• 제6권2호
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• pp.100-107
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• 2011

As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements(PEs) and operates on a 3-stage pipelining. Experimental results for the JPEG encoding algorithm indicate that the proposed parallel processor outperforms conventional parallel processors in terms of performance and energy efficiency. In addition, the proposed parallel processor architecture was developed and verified with verilog HDL and a FPGA prototype system.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2010년도 춘계학술발표대회
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• pp.17.2-17.2
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• 2010

Printed electronics is an emerging technology to realize various microelectronic devices via a cost-effective method. Here we demonstrated a high performance of p-channel and n-channel top-gate/bottom contact polymer field-effect transistors (FETs), and applications to elementary organic complementary inverter and ring oscillator circuits by inkjet processing. We could obtained high field-effect mobility more than $0.4\;cm^2/Vs$ for both of p-channel and n-channel FETs, and successfully measured inkjet-printed polymer inverters. The performance of devices highly depends on the selection of dielectrics, printing condition and device architecture. Optimized CMOS ring oscillators with p-type and n-type polymer transistors showed as high as 50 kHz operation frequency. This research was financially supported by development of next generation RFID technology for item level applications (2008-F052-01) funded by the ministry of knowledge economy (MKE).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.67-70
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• 2000

DSP is used for processing the digital data in such as the multimedia applications. Because the digital data of high rate is demanded more and more, high performance is increasingly required in DSP. In this paper, we discuss important issues for development of high performance DSP, analyze architectures of several commercial DSP chips, and propose a new architecture. Finally, we show that the new architecture has the highest performance.

• Journal of Computing Science and Engineering
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• 제6권4호
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• pp.294-309
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• 2012

In the age of multi-core and specialized accelerators in high performance computing (HPC) systems, it is critical to understand application characteristics and apply suitable optimizations in order to fully utilize advanced computing system. Often time, the process involves multiple stages of application performance diagnosis and a trial-and-error type of approach for optimization. In this study, a general guideline of performance optimization has been demonstrated with two class-representing applications. The main focuses are on node-level optimization and inter-node scalability improvement. While the number of optimization case studies is somewhat limited in this paper, the result provides insights into the systematic approach in HPC applications performance engineering.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제10권4호
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• pp.1643-1660
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• 2016

Connectivity and trust in social networks have been exploited to propose applications on top of these networks, including routing, Sybil defenses, and anonymous communication systems. In these networks, and for such applications, connectivity ensures good performance of applications while trust is assumed to always hold, so as collaboration and good behavior are always guaranteed. In this paper, we study the impact of differential behavior of users on performance in typical social network-enabled routing applications. We classify users into either collaborative or rational (probabilistically collaborative) and study the impact of this classification and the associated behavior of users on the performance of such applications, including random walk-based routing, shortest path based routing, breadth-first-search based routing, and Dijkstra routing. By experimenting with real-world social network traces, we make several interesting observations. First, we show that some of the existing social graphs have high routing costs, demonstrating poor structure that prevents their use in such applications. Second, we study the factors that make probabilistically collaborative nodes important for the performance of the routing protocol within the entire network and demonstrate that the importance of these nodes stems from their topological features rather than their percentage of all the nodes within the network.

• Journal of Electrical Engineering and Technology
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• 제6권4호
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• pp.573-579
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• 2011

To meet the scalability and performance requirements of data analyses, which often involve voluminous data, efficient parallel or concurrent algorithms and frameworks are essential. We present a high-performance Korean morphological analyzer which employs the MapReduce framework on the graphics processing unit (GPU). MapReduce is a programming framework introduced by Google to aid the development of web search applications on a large number of central processing units (CPUs). GPUs are designed as a special-purpose co-processor. Their programming interfaces are typically formulated for graphics applications. Compared to CPUs, GPUs have greater computation power and memory bandwidth; however, GPUs are more difficult to program because of the design of their architectures. The performance of the Korean morphological analyzer using the MapReduce framework on the GPU is evaluated in comparison with the CPU-based model. The proposed Korean Morphological analyzer shows promising scalable performance on distributed computing with the GPU.

• Advances in concrete construction
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• 제1권2호
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• pp.151-162
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• 2013

The performance characteristics of high-strength and high-performance concrete are discussed in this review. Recent developments in the field of high-performance concrete marked a giant step forward in high-tech construction materials with enhanced durability, high compressive strength and high modulus of elasticity particularly for industrial applications. There is a growing awareness that specifications requiring high compressive strength make sense only when there are specific strength design advantages. HPC today employs blended cements that include silica fume, fly ash and ground granulated blast-furnace slag. In typical formulations, these cementitious materials can exceed 25% of the total cement by weight. Silica fume contributes to strength and durability; and fly ash and slag cement to better finish, decreased permeability, and increased resistance to chemical attack. The influences of various mineral admixtures such as fly ash, silica fume, micro silica, slag etc. on the performance of high-strength concrete are discussed.

• 한국컴퓨터정보학회논문지
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• 제23권10호
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• pp.1-9
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• 2018

Modern graphics processing units (GPUs) have become one of the most attractive platforms in exploiting high thread level parallelism with the support of new programming tools such as CUDA and OpenCL. Recent GPUs has applied cache hierarchy to support irregular memory access patterns; however, L1 data cache (L1D) exhibits poor efficiency in the GPU. This paper shows that the L1D does not always positively affect the applications in terms of performance and energy efficiency for the GPU. The performance of the GPU is even harmed by using the L1D for lots of applications. Our proposed technique exploits the characteristics of the currently-executed applications to predict the performance impact of the L1D on the GPU and then decides whether to continuously use the cache for the application or not. Our experimental results show that the proposed technique improves the GPU performance by 9.4% and saves up to 52.1% of the power consumption in the L1D.