• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.1
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• pp.12-20
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• 1997

Physical interconnect such as Printed Circuit Board(PCB) traces introduces new challenges for parameter extraction and delay calculation for high-speed system design. PCB traces are dominated by frequency dependent LC propagation which makes precharacterization difficult for all possible configurations. Moreover, simulating the transient behavior of the trace for noise and delay analysis requries the combined used of a variety of models and techniques for efficiently handling lossy, low-loss, frequency dependent, and coupled transmission lines together with lumped elements. In this paper we explain how the frequency dependence caused by ground plane proximity and skin effects can be modeled using the adstracted models. These abstracted (lumped) models are SPICE-compatible and can be simulated in time-domain, along with precharacterized lumped parasitic elements and nonlinear driver and load models.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.95-96
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• 2012

본 논문에서는 조명용 LED 구동 장치를 위한 새로운 방식의 단일전력단을 갖는 LED 구동회로를 제안한다. 제안 회로는 임계모드에서 동작하는 부스트 컨버터를 역률 개선 회로로 사용하였고, LED 구동회로로 LLC 고주파 공진 회로를 채택하였다. 또한, 기존의 역률 개선 회로와 LED 구동회로의 2단 회로를 단일전력단을 갖는 회로로 구성함으로 고역률, 고효율, 경량 및 소형의 LED 구동회로를 구성하였다. 본 논문에서는 제안한 회로의 동작 원리를 설명하였고, 시뮬레이션과 실험을 통하여 제안 회로의 타당성을 입증하였다.

• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.1292-1294
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• 1996

The general output circuit for PWM output is pushpull using a complimentary MOSFET. The gate driver coupled directly at gate can switch easy upto a high frequency. However, a high reverse recovery current and parastic components make a oscillation output. This paper analyses this phenomenon and proposes a novel output circuit preventing the oscillation.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.723-727
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• 2004

A new high-performance and low cost single switch energy recovery display driver for an AC plasma display panel (PDP) is proposed. Since it is composed of only one auxiliary power switch, two small inductors, and eight diodes compared with the conventional circuit consisting of four auxiliary power switches, two small inductors, eight power diodes, and two external capacitors, it features a much simpler structure and lower cost. Nevertheless, since the rootmean-square (RMS) value of the inductor current is very small, it also has very desirable advantages such as n low conduction loss and high efficiency. Furthermore, there are no serious voltage-drops caused by the large gas-discharge current with the aid of the discharge current compensation, which can also greatly reduce the current flowing through power switches and maintain the panel to light at n lower sustaining voltage. In addition, all main power switches are turned on under the zero-voltage switching (ZVS) and thus, the proposed circuit has a improved EMI, increased reliability, and high efficiency. Therefore, the proposed circuit will be well suited to the wall hanging PDP TV. To confirm the validity of the proposed circuit, circuit operations, features,and design considerations are presented and verified experimentally on a 6-inch PDP, 50kHz-switching frequency, and sustaining voltage 141V based prototype.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.167-173
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• 2005

The isolation of the series PIN diode switch is restricted by the parallel capacitance of PIN diode and the switch driver circuit limits switching speed of PIN diode switch. To overcome these problems, a high isolation and high switching speed Pin diode switch is proposed adapting the parallel resonant inductance and TTL compatible switch driver circuit. The measurement results of the 3 GHz PM diode switch show 1 GHz frequency band, less than 1.5 dB insertion loss, 65 dB isolation, more than 15 dB return loss and less than 30 ns switching speed. In particular the 3 GHz PIN diode switch using the parallel resonant inductance exhibits the improvement of isolation by 15 dB.

• Korean Journal of Culture and Social Issue
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• v.12 no.1
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• pp.81-102
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• 2006

This study focused on driver's carefulness and researched the relationship between driving confidence and driving behaviour in elderly and young drivers. In order to evaluate the driving confidence level, 'Driving Confidence Scale' was developed. 175 of young drivers(younger than 25) and 150 of elderly drivers(older than 65) conducted Driving Confidence Scale. They answered their driving patterns; driving history, annual mileage, the frequency of committing traffic violation, and experience of accident within 5 years. Elderly driver's data was collected by face to face interview. The factors of driving confidence were analyzed and the driving confidence level of young and elderly drivers was compared. Driving Confidence was consisted of 4 factors; environment of traffic condition, safe driving, driving ability, attention. Elderly driver's confidence was lower than young driver's. Elderly drivers in high driving confidence group, showed longer driving history and they were tend to commit violations more frequently than elerly drivers in low driving confidence group. Young drivers, whose driving confidence level was high answered more driving history, annual mileage, the frequency of committing traffic violation and experience of accident within 5 years.

• Journal of the Korea Computer Industry Society
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• v.2 no.8
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• pp.1063-1068
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• 2001

In this paper, we designed a high resolution six channel DSB modulator of Acousto-Optic effect generator make use of DDS technology. Also, configured seamless connection for other instruments to use IEEE-488 bus interface. We programmed the device driver for DDS and DAC control by 80C51 assembler language. And, high resolution 6 channel DSB modulator has improved the important characteristics of that the frequency tuning range, the resolution, the switching time. This DSB modulator system can use high precision frequency synthesizer for instruments.

• Proceedings of the KSR Conference
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• 2008.06a
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• pp.820-825
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• 2008

In the article 16 of the domestic rolling stock crashworthiness regulations, the collision acceleration level during collision accidents should remain under the maximum 7.5g and the average 5g. By the way, the accelerations obtained in crash simulations and tests contain many kinds of high frequency components due to numerical oscillations or noisy signals. So, this paper aims to develop reliable post-processing methods to filter high frequency oscillations and extract the rigid body motions of passenger rail cars. For this study we used the 1-dimensional dynamic model of KHST (Korean high-speed train), and evaluated acceleration data at the driver's area in the first power car and the passenger area in the following trailer.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.73-76
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• 2010

A two-facet approach was used to investigate the parametric performance of functional high-speed DDR3 (Double Data Rate) DRAM (Dynamic Random Access Memory) die placed in different types of BGA (Ball Grid Array) packages: wire-bonded BGA (FBGA, Fine Ball Grid Array), flip-chip (FCBGA) and lead-bonded $microBGA^{(R)}$. In the first section, packaged live DDR3 die were tested using automatic test equipment using high-resolution shmoo plots. It was found that the best timing and voltage margin was obtained using the lead-bonded microBGA, followed by the wire-bonded FBGA with the FCBGA exhibiting the worst performance of the three types tested. In particular the flip-chip packaged devices exhibited reduced operating voltage margin. In the second part of this work a test system was designed and constructed to mimic the electrical environment of the data bus in a PC's CPU-Memory subsystem that used a single DIMM (Dual In Line Memory Module) socket in point-to-point and point-to-two-point configurations. The emulation system was used to examine signal integrity for system-level operation at speeds in excess of 6 Gb/pin/sec in order to assess the frequency extensibility of the signal-carrying path of the microBGA considered for future high-speed DRAM packaging. The analyzed signal path was driven from either end of the data bus by a GaAs laser driver capable of operation beyond 10 GHz. Eye diagrams were measured using a high speed sampling oscilloscope with a pulse generator providing a pseudo-random bit sequence stimulus for the laser drivers. The memory controller was emulated using a circuit implemented on a BGA interposer employing the laser driver while the active DRAM was modeled using the same type of laser driver mounted to the DIMM module. A custom silicon loading die was designed and fabricated and placed into the microBGA packages that were attached to an instrumented DIMM module. It was found that 6.6 Gb/sec/pin operation appears feasible in both point to point and point to two point configurations when the input capacitance is limited to 2pF.

• Computational Structural Engineering : An International Journal
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• v.1 no.2
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• pp.89-96
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• 2001

A study on the topology optimization of a Hard-Disk-Driver(HDD) actuator arm is presented. The purpose of the present wert is to increase the natural frequency of tole first lateral mode of the HDD actuator arm under the constraint of total moment of inertia, so as to facilitate the position control of the high speed actuator arm. The first lateral mode is an important factor in the position control process. Thus the topology optimization for 2-D model of the HDD actuator arm is considered. A new objective function corresponding to multieigenvalue optimization is suggested to improve the solution of the eigenvalue optimization problem. The material density of the structure is treated as the design variable and the intermediate density is penalized. The effects of different element types and material property functions on the final topology are studied. When the problem is discretized using 8-node element of a uniform density, tole smoothly-varying density field is obtained without checker-board patterns incurred. AS a result of 7he study, an improved design of the HDD actuator arm is suggested. Dynamic characteristics of the suggested design are compared computationally with those of the old design. With the same amount of the moment of inertia, the natural frequency of the first lateral mode of the suggested design is subsequently increased over the existing one.