• 한국신재생에너지학회:학술대회논문집
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• 2007.11a
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• pp.255-258
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• 2007

In this paper, a PV multi-string PCS with a grid-connection is proposed. An improved MPPT algorithm for the PV multi-string PCS is suggested. Each PV string has its own MPP tracker and the proposed MPPT algorithm prevents LMPP tracking due to power ripple. In the PV PCS with single-phase inverter has a large current ripple at twice the grid frequency. The current ripple reduction algorithm without external component is suggested. Also, this paper proposes a simple control method to achieve sharing of the PV string voltage and current among the interleaved parallel boost converters. All algorithms and controllers are implemented on a single-chip microcontroller. Experimental results obtained on a 3kW prototype show high performance of the proposed PV multi-string PCS.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.551-554
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• 2002

This paper describes a new interactive inverter between a photovoltaic(PV) array and single-phase utility that avoid the bulky input (60Hz) transformer on the AC side. The interface employs a pwm boost converter on the DC side followed by a pwm current-forced single-phase rectifier for injecting the power from the PV array into the mains. The current waveform at the AC side remains sinusoidal and exactly in phase at all time. The circuit also has the advantage of requiring fewer switching device than high-frequency link system. This paper describes modeling of PV array and new system topology. Simulation results on the performance of the connection are also presented.

• Journal of Power Electronics
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• v.7 no.1
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• pp.55-63
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• 2007

This paper proposes a simple unity power factor zero-voltage-transition (ZVT) pulse-width-modulated (PWM) single-phase rectifier, which features reduced switching and conduction losses. The switching loss reduction is achieved by a simple auxiliary commutation circuit, and the conduction loss reduction is achieved by employing a single-stage converter, rather than a typical double-stage converter comprising of a front-end rectifier and a boost rectifier. Furthermore, thanks to good features such as a simple PWM control at constant frequency, low switch stress, low Var rating of commutation circuits, and simple power circuit structure, it is suitable for high power applications. The principles of operation are explained in detail, and a major characteristics analysis and the experimental results of the new converter are also included in this paper.

• Journal of Biomedical Engineering Research
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• v.17 no.3
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• pp.305-312
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• 1996

A new three dimensional fractal coding is proposed with a perceptually enhanced matching. Since most of medical images (e.g. computed tomoyaphy or magnetic resonance images) have three dimensional characters, searching regions are extended to adjacent slices. For a perceptually enhanced matching, a high frequency boost filter is used for pre-filtering images to be encoded, and a least mean square error matching is applied to the edge enhanced Images rather than the original images. From simulation with magnetic resonance images($255\times255$, 8bits/pixel), reconstructed images by the proposed compression algorithm show much improved subjective image quality with higher peak signnal-to-noise ratio compared to those by existing fractal coding algorithms at compression ratios of about 10.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.546-548
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• 2005

This paper proposes a unity power factor ZVT PWM single-phase rectifier. The ZVT soft switching are achieved by using a simple ZVT circuit, and the reduced conduction losses are achieved by employing a single-stage converter, instead of a typical double-stage converter composed of front end diode rectifier and cascaded boost rectifier. Furthermore, thanks to good features such as simple PWM control at constant frequency, low switch stress and low VAR rating of commutation circuits, it is suitable for high power applications. The principle of operation is explained in detail, and simulation results of the new converter are also included.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.434-435
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• 2018

In this paper, a single-phase single-stage three-level AC/DC converter with a wide controllable output voltage is presented. It integrates a PFC converter and a three level DC/DC converter into one. The proposed converter operates at a fixed frequency and provides a wide controllable output voltage ($200V_{dc}-430V_{dc}$) with high efficiencies over a wide load range. In addition, the input boost inductors operate in a discontinuous mode to improve the input power factor. Moreover, all the switching devices operate with ZVS, and the converter's THD is small especially at full load. The feasibility of the proposed converter is verified with experimental results of a 1.5kW prototype.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.9
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• pp.467-472
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• 2001

In conventional zero-current-switching(ZCS) PWM converters, zero-current turn-off for main switch without increasing voltage/current stresses is achieved at a fixed frequency. The switching loss, stress, and noise, however, can\`t be minimized because they adopt auxiliary switches turned off and main switches turned on under hard-switching condition. In this paper, new ZCS-PWM converters of which all switches are always operating with soft-switching condition are proposed. Therefore, the proposed ZCS-PWM converters are most suitable for systems requiring high-power density Breadboarded ZCS-PWM boost converters using power MOSFET are constructed to verify theoretical analysis.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1348-1350
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• 2000

Zero-voltage and zero-current switched single-stage approach with high power factor is presented to reduce the switching losses and to achieve sinusoidal, unity power factor input currents. This single-stage approach, which combines a boost converter used as PFC with a half-bridge converter used as do to do conversion into one power stage, has a simple structure and low cost. At the same time, since the switches of the proposed converter are designed to be turned on at zero-voltage and off at zero-current, the switching losses could be reduced considerably. Detailed analysis and experimental results are presented on the proposed converter, which is operated at constant switching frequency and in discontinuous conduction mode.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.78-79
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• 2017

본 논문에서는 스위칭 손실을 저감한 고주파 인터리브드 토템폴 브리지리스 부스트 PFC 컨버터를 제안한다. 인터리브드 토템폴 브리지리스 부스트 PFC 컨버터는 하드 스위칭 동작을 하기 때문에 큰 스위칭 손실을 가지며, 고주파에서의 동작이 제한된다. 제안하는 컨버터는 수동 소자인 인덕터가 추가된 구조이며, 추가 인덕터의 에너지를 이용해 영전압 스위칭을 할 수 있다. 그 결과, 스위칭 손실이 저감되고 고주파 동작이 가능해진다. 또한 기존에 설계된 회로와 제어단을 그대로 유지할 수 있다.

• Journal of information and communication convergence engineering
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• v.11 no.2
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• pp.118-123
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• 2013

This paper proposes an efficient hardware architecture for high efficiency video coding (HEVC), which is the next generation video compression standard. It adopts several new coding techniques to reduce the bit rate by about 50% compared with the previous one. Unlike the previous H.264/AVC 6-tap interpolation filter, in HEVC, a one-dimensional seven-tap and eight-tap filter is adopted for luma interpolation, but it also increases the complexity and gate area in hardware implementation. In this paper, we propose a parallel architecture to boost the interpolation performance, achieving a luma $4{\times}4$ block interpolation in 2-4 cycles. The proposed architecture contains shared operations reducing the gate count increased due to the parallel architecture. This makes the area efficiency better than the previous design, in the best case, with the performance improved by about 75.15%. It is synthesized with the MagnaChip $0.18{\mu}m$ library and can reach the maximum frequency of 200 MHz.