• ETRI Journal
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• v.28 no.5
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• pp.660-663
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• 2006

In this letter, we propose a frame-size adaptive MAC protocol for high rate wireless personal area networks (WPANs). In the proposed scheme, during communication, frame error rate is periodically reported to a transmitting device and the frame size is changed according to the measured results. Thus, the channel can be more effectively utilized by adapting to variable radio conditions. Analytical results show that this scheme achieves a much higher throughput than a non-frame-size adaptive media access control protocol in high-rate WPANs.

• Proceedings of the IEEK Conference
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• 2002.06d
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• pp.25-28
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• 2002

This paper presents variable bit rate(VBR) rate control scheme based on MPEG-4 VM8 rate control scheme. An initial Q searching method provides more accurate bit allocation for the first frame. A frame skipping and RD Model update scheme when coded frame quality is too low or high prevents image quality fluctuation.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.8
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• pp.112-119
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• 2004

This paper develops a computer model of a cabover type large truck for estimating the effects of the mounted method of frame on handling performance. The computer model considers two mounted methods of frame; flange mounted and web mounted. Frame is modeled by finite elements using MSC/NASTRAN in order to consider the flexibility of frame. The reliability of the developed computer model is verified by comparing the actual vehicle test results with the simulation results. The actual vehicle test is performed in a double lane change course, and lateral acceleration, yaw rate, and roll angle are measured. To estimate the effects of the mounted method of frame on handling performance, simulations are performed with the flange mounted and web mounted frame. Simulation results show that the web mounted frame＇s variations of roll angle, lateral acceleration, and yaw rate are larger than the flange mounted frame＇s variations, especially in the high test velocity and the second part of the double lane course. Also, simulation results show that the web mounted frame＇s tendencies of roll angle, lateral acceleration, and yaw rate advance the flange mounted frame＇s tendencies, especially in the high test velocity and the second part of the double lane course.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.4
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• pp.1877-1891
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• 2016

In video coding, the goal of rate control (RC) is not only to avoid the undesirable fluctuation in bit allocation, but also to provide a good visual perception. In this paper, a novel frame-level rate control algorithm for High Efficiency Video Coding (HEVC) is proposed. Firstly a model that reveals the relationship between bit per pixel (bpp), the bitrate of the intra frame and the bitrate of the subsequent inter frames in a group of pictures (GOP) is established, based on which the target bitrate of the first intra frame is well estimated. Then a novel frame-level bit allocation algorithm is developed, which provides a robust bit balancing scheme between the intra frame and the inter frames in a GOP to achieve the visual quality smoothness throughout the whole sequence. Our experimental results show that when compared to the RC scheme for HEVC encoder HM-16.0, the proposed algorithm can produce reconstructed frames with more consistent objective video quality. In addition, the objective visual quality of the reconstructed frames can be improved with less bitrate.

• Transactions of Materials Processing
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• v.28 no.6
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• pp.368-374
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• 2019

The past recent years have seen an increasing use of high-strength steel sheets in the automotive industry. However, the formability and damage prediction of these materials requires accurate acquisition of necking and fracture strains. Digital image correlation (DIC) is used to accurately capture the necking and fracture strains during testing. The fact that single time points of capturing vary with frame rate makes the need for an investigation necessary. For the high-strength steel DP980, the frame-rate dependences of the final necking and fracture strains values are analyzed here. To eliminate the influence of gauge length, the strains were measured locally by DIC. Results for three specimen shapes obtained with frame rates of 1 and 900 fps (frames per second) were considered and based on them, triaxiality failure diagrams (TFD) are established. It was observed that after diffuse necking, the deformation path departed from the initially linear one, and the stress triaxiality grew with ongoing deformation. It was further revealed that the frame rate-dependence of the necking strain was rather low (< 2%), whereas the fracture strain could be underestimated by up to 8% when the lower frame rate of 1 fps was used (compared with 900 fps). In this study, this issue is investigated while taking into consideration the three different triaxialities. These results demonstrate the importance of choosing an appropriate frame rate for the determination of necking and fracture strains in particular.

• The Journal of the Acoustical Society of Korea
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• v.31 no.2
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• pp.93-99
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• 2012

For speech coding, a vocal tract is modeled using Linear Predictive Coding (LPC) coefficients. The LPC coefficients are typically transformed to Line Spectral Frequency (LSF) parameters which are advantageous for linear interpolation and quantization. If multidimensional LSF data are quantized directly using Vector-Quantization (VQ), high rate-distortion performance can be obtained by fully utilizing intra-frame correlation. In practice, since this direct VQ system cannot be used due to high computational complexity and memory requirement, Split VQ (SVQ) is used where a multidimensional vector is split into multilple sub-vectors for quantization. The LSF parameters also have high inter-frame correlation, and thus Predictive SVQ (PSVQ) is utilized. PSVQ provides better rate-distortion performance than SVQ. In this paper, to implement the optimal predictors in PSVQ for voice storage devices, we propose Multi-Frame AR-model based SVQ (MF-AR-SVQ) that considers the inter-frame correlations with multiple previous frames. Compared with conventional PSVQ, the proposed MF-AR-SVQ provides 1 bit gain in terms of spectral distortion without significant increase in complexity and memory requirement.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.1
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• pp.426-445
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• 2012

Conventional rate control (RC) schemes for H.264 video coding usually regulate output bit rate to match channel bandwidth by adjusting quantization parameter (QP) at fixed full frame rate, and the passive frame skipping to avoid buffer overflow usually occurs when scene changes or high motions exist in video sequences especially at low bit rate, which degrades spatial-temporal quality and causes jerky effect. In this paper, an active content adaptive frame skipping scheme is proposed instead of passive methods, which skips subjectively trivial frames by structural similarity (SSIM) measurement between the original frame and the interpolated frame via motion vector (MV) copy scheme. The saved bits from skipped frames are allocated to coded key ones to enhance their spatial quality, and the skipped frames are well recovered based on MV copy scheme from adjacent key ones at the decoder side to maintain constant frame rate. Experimental results show that the proposed active SSIM-based frameskip scheme acquires better and more consistent spatial-temporal quality both in objective (PSNR) and subjective (SSIM) sense with low complexity compared to classic fixed frame rate control method JVT-G012 and prior objective metric based frameskip method.

• Proceedings of the IEEK Conference
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• 2000.09a
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• pp.429-432
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• 2000

We propose a new frame rate up-conversion algorithm for high quality video. In the proposed scheme bidirectional motion estimation (ME) is performed to construct the motion vector. (MV) field for the frame to be interpolated. Unlike conventional motion-compensated interpolation (MCI) algorithms, the proposed technique does not produce any overlapped pixel and hole region in the interpolated frame, and thus can utilize the overlapped block motion compensation technique to reduce the blocking artifacts. The proposed algoritm is very simple to implement on consumer products when compared to conventional MCI methods. Computer simulation shows a high visual performance of the proposed frame rate up-conversion algorithm.

• Journal of the Optical Society of Korea
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• v.17 no.6
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• pp.513-517
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• 2013

Recently, maskless lithography (ML) systems have become popular in digital manufacturing technologies. To achieve high-throughput manufacturing processes, digital micromirror devices (DMD) in ML systems must be driven to their operational limits, often in harsh conditions. We propose an instrument and algorithm to detect DMD malfunctions to ensure perfect mask image transfer to the photoresist in ML systems. DMD malfunctions are caused by either bad DMD pixels or data transfer errors. We detect bad DMD pixels with $20{\times}20$ pixel by white and black image tests. To analyze data transfer errors at high frame rates, we monitor changes in the frame rate of a target DMD pixel driven by the input data with a set frame rate of up to 28000 frames per second (fps). For our data transfer error detection method, we verified that there are no data transfer errors in the test by confirming the agreement between the input frame rate and the output frame rate within the measurement accuracy of 1 fps.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.22-28
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• 2015

This paper proposes column-parallel three step Single Slope Analog-to-Digital Converter (SS-ADC) for high frame rate VGA CMOS Image Sensors (CISs). The proposed three step SS-ADC improves the sampling rate while maintaining the architecture of the conventional SS-ADC for high frame rate CIS. The sampling rate of the three-step ADC is increased by a factor of 39 compared with the conventional SS-ADC. The proposed three-step SS-ADC has a 12-bit resolution and 200 kS/s at 25 MHz clock frequency. The VGA CIS using three step SS-ADC has the maximum frame rate of 200 frames/s. The total power consumption is 76 mW with 3.3 V supply voltage without ramp generator buffer. A prototype chip was fabricated in a $0.13{\mu}m$ CMOS process.