• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.12
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• pp.2686-2695
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• 1997

The MC-CDMA(multi-carrier code division multiple access) technique is known to be appropriate for high data-rate wireless communications such as mobile multimedia communication due to its robustness to multipath fading and its capability of handing high data rates with a simple one-tap equalizer. In this paepr, the performance of a MC-CDMA cellular system employing antenna arrays at the based station in a fading channel is presented. It is whown that the interference from other users within the cell can be significantly reduced for both reverse link (mobile to base station) and forward link (base station to mobile) using a MC-CDMA with antenna arrays, thus incresig the system's user-capacity. Computer simulations that demonstrate user-capacity improvement of the proposed approach are discussed.

• The Journal of Engineering Research
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• v.2 no.1
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• pp.39-47
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• 1997

This paper presents a single board digital signal processing system which can perform two-dimensional (2-D) digital infinite impulse response (IIR) filtering in realtime. We have developed an architecture to provide not only the necessary computational power but also a balance of the system input/output and computational requirements. The architecture achieves large system throughput by using highly parallel processing at both the system and processor levels. It reduces system data communication requirements significantly by taking advantage of a custom-designed processor and by providing each processor with its own input and ouput channel. After system initialization, almost 100 percent of the time is used for data processing. Data transfers occur concurrently with data processing. The functional level simulation reveals that the system throughput can reach as high as one pixel per system cycle. With only 10MHz clock frequency system, it can implement up to fourth order 2-D IIR filters for video-rate data ($512\times512$ pixels per frame at 30 frames per second). If we increase the system frequency, the system can be used for the preprocessing and postprocessing of video signal of HDTV.

• Korean Journal of Remote Sensing
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• v.24 no.5
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• pp.397-408
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• 2008

A wide variety of applications of imaging spectrometer have been proved using data from airborne systems. The Compact Airborne Imaging Spectrometer System (CAISS) was jointly designed and developed as the airborne hyperspectral imaging system by Korea Aerospace Research Institute (KARI) and ELOP inc., Israel. The primary mission of the CAISS is to acquire and provide full contiguous spectral information with high spatial resolution for advanced applications in the field of remote sensing. The CAISS consists of six physical units; the camera system, the gyro-stabilized mount, the jig, the GPS/INS, the power inverter and distributor, and the operating system. These subsystems are to be tested and verified in the laboratory before the flight. Especially the camera system of the CAISS has to be calibrated and validated with the calibration equipments such as the integrating sphere and spectral lamps. To improve data quality and its availability, it is the most important to understand the mechanism of imaging spectrometer system and the radiometric and spectral characteristics. The several performance tests of the CAISS were conducted in the camera system level. This paper presents the major characteristics of the CAISS, and summarizes the results of performance tests in the camera system level.

• Journal of IKEEE
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• v.20 no.1
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• pp.61-67
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• 2016

In this paper, a hardware design method is proposed for high speed high precision neutron radiation measurements. Our system is fabricated to use a high performance A/D Converter for digital data conversion of high precision and high speed analog signals. Using a neutron sensor, incident neutron radiation particles are detected; a precision microcurrent measurement module is also included: this module allows for more precise and rapid neutron radiation measurement design. The high speed high precision neutron measurement hardware system is composed of the neutron sensor, variable high voltage generator, microcurrent precision measurement component, embedded system, and display screen. The neutron sensor detects neutron radiation using high density polyethylene. The variable high voltage generator functions as a 0 ~ 2KV variable high voltage generator that is robust against heat and noise; this generator allows the neutron sensor to perform normally. The microcurrent precision measurement component employs a high performance A/D Converter to precisely and swiftly measure the high precision high speed microcurrent signal from the neutron sensor and to convert this analog signal into a digital one. The embedded system component performs multiple functions including neutron radiation measurement for high speed high precision neutron measurements, variable high voltage generator control, wired and wireless communications control, and data recording. Experiments using the proposed high speed high precision neutron measurement hardware shows that the hardware exhibits superior performance compared to that of conventional equipment with regard to measurement uncertainty, neutron measurement rate, accuracy, and neutron measurement range.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.11
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• pp.5512-5517
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• 2012

In this paper we suggest multimedia synchronization model that is based on the Petri-net and services desirable quality of service requirement. Proposed model applies variable buffer which can be allowed, and then it presents high quality of service and real time characteristics. This paper decreases the data loss resulted from variation of delay time and from loss time of media-data by means of applying delay jitter in order to deal with synchronization interval adjustment. Plus, the mechanism adaptively manages the waiting time of smoothing buffer, which leads to minimize the gap from the variation of delay time. The proposed paper is suitable to the system which requires the guarantee of high quality of service and mechanism improves quality of services such as decrease of loss rate, increase of playout rate.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.10
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• pp.1183-1188
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• 2015

The FM-QCSK(: Frequency Modulated Quadrature Chaos Shift Keying) system is one of the most efficient systems in chaotic literature. One of the problems in this system is that half the bit duration is used for sending a chaotic reference signal which leads to increase the energy losses and reduces the data rate. In this paper, a novel scheme to enhance the performance of FM-QCSK system has been proposed. With the proposed scheme, FM-QCSK would be able to operate at higher data rates with reduced BER(: Bit Error Rate) and energy consumption. The basic modification introduced by the proposed scheme is the use one reference chaotic signal to transmit multi information signals in both in-phase and quadrature-phase channels. The results showed that the proposed scheme have achieved more than 3 dB gains in SNR for AWGN channels respectively at $BER=10^{-3}$ over the conventional one. The results also showed that the optimum number information signals can be send per reference signal is 8.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.1
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• pp.74-81
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• 2003

In this study, we'd implemented a real time embedded speech recognition system that requires minimum memory size for speech recognition engine and DB. The word to be recognized consist of 40 commands used in a PCS phone and 10 digits. The speech data spoken by 15 male and 15 female speakers was recorded and analyzed by short time analysis method, which window size is 256. The LPC parameters of each frame were computed through Levinson-Burbin algorithm and they were transformed to Cepstrum parameters. Before the analysis, speech data should be processed by pre-emphasis that will remove the DC component in speech and emphasize high frequency band. Baum-Welch reestimation algorithm was used for the training of HMM. In test phone, we could get a recognition rate using likelihood method. We implemented an embedded system by porting the speech recognition engine on ARM core evaluation board. The overall recognition rate of this system was 95%, while the rate on 40 commands was 96% and that 10 digits was 94%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.1
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• pp.51-57
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• 2016

This paper describes the physical layer modem structure of Giga KOREA 5G system which is being developed by ETRI as a 5G telecommunications prototype. The objective of Giga KOREA 5G system is supporting maximum 100 Gbps data rate for each cell with wide-bandwidth baseband station and mobile station prototypes in mmWave (10~40 GHz) environment. To achieve this objective, its physical layer is composed of high performance baseband station as well as mobile station and their OFDM TDD modems. The important features of Giga KOREA 5G physical layer are carrier aggregation, multiple receiving beam searching in mobile station, high data rate channel encoder and decoder and high speed modulation and demodulation functions.

• The Transactions of the Korea Information Processing Society
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• v.4 no.3
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• pp.811-820
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• 1997

Disk arrays are using to enhance data trandfer rate and I/O performance in multimedia applications which need a high-performance storage device with large storage capacity and high-speed network.As performance varies with configuration and data layout scheme,disk array characteristic variables must be approrpriately deter-mined in desibning disk array archetecture for a speciffic applicatoin. In this paper,in order to design a disk array architecturte as a storage server of a small-scale VOD system,we evaluate performance of a disk array to chose the number of disks in the array,disk array cinfiguration,a degree of declustering for a given data block size of continous media file system and I/D request size through simulation.Simulation result shows that RAID level 5 with 5 disks ios a suitable candidate for the disk array architecture which privides MPEG-2 files with a rate of 6 Mbps,Moreover,we whow that stripe unit is 64 KB and a layout scheme is contigous placement.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1296-1299
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• 2002

We implemented a CD signal processor operated on a CAV 48-speed CD-ROM drive into a VLSI. The CD signal processor is a mixed mode monolithic IC including servo-processor, data recovery, data-processor, and I-bit DAC. For servo signal processing, we included a DSP core, while, for CAV mode playback, we adopted a PLL with a wide recovery range. Data processor (DP) was designed to meet the yellow book specification.［2］So, the DP block consists of EFM demodulator, C1/C2 ECC block, audio processor and a block transferring data to an ATAPI chip. A modified Euclid's algorithm was used as a key equation solver for the ECC block To achieve the high-speed decoding, the RS decoder is operated by a pipelined method. Audio playability is increased by playing a CD-DA disc at the speed of 12X or 16X. For this, subcode sync and data are processed in the same way as main data processing. The overall performance of IC is verified by measuring a transfer rate from the innermost area of disc to the outermost area. At 48-speed, the operating frequency is 210 ㎒, and this chip is fabricated by 0.35 um STD90 cell library of Samsung Electronics.