• Title/Summary/Keyword: high cut-off frequency

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Method for Calculating the Position of the LPMSM for Driving Linear Compressor (선형압축기 구동용 LPMSM의 위치 계산 방법)

  • Ahn, J.R.;Chun, T.W.;Lee, H.H.;Kim, H.G.;Nho, E.C.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.584-586
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    • 2005
  • The stroke of piston in the linear compressor driven by LPMSM can be obtained from integrating the input voltage and current of LPMSM, and may be diverged due to dc components In the voltage and current. The strategy to prevent the divergence of stroke using both the high-pass filter and dc offset compensation was suggested. The equations for the magnitude and phase of the stroke and also dc offset including the stroke are derived as a function of the cut-off frequency of HPF. The performance of stroke calculation scheme has been verified by experimentally on a linear compressor drive system, where the control was implemented by a 16-bit DSP.

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The kinematics analysis of Discus throwing (원반던지기의 운동학적 분석)

  • Kim, Jong-In;Sun, Jae-Bok
    • Korean Journal of Applied Biomechanics
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    • v.13 no.2
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    • pp.29-47
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    • 2003
  • This study is to analyze the kinematic variables in release motion of discuss throwing. For the matter, 5 people from the national team and collegiate discuss throwing in the year 2001 were chosen as the subjects and two S-VHS video cameras set in 60frames/sec were used for recording their motions. Coordinated raw positions data through digitizing are smoothing by butter-worth 's low-pass filtering method at a cut off frequency 6.0Hz. and the direct linear transformation(DLT) method was employed to obtain 3-D position coordinates. The conclusions were as follows; 1. The better record players showed the shorter approach time in the last support phase. 2. In the displacement CG, the better record players showed the shorter displacement in medial-lateral direction, and the longer displacement in horizontal direction. In the motion, the COG showed longer displacement vertical direction. 3. The better record players showed the faster horizontal velocity than vertical velocity in the release. 4. The better record players showed to take the posture of vertical axis in the release.

Studies on the Detection of Visual-TEP with Average Method & the Improvement of TEP with DC-Drift Elinination (Average 기법에 의한 Visual-TEP의 검출과 DC-Drift 제거에 의한 TEP 신호개선에 관한 연구)

  • 배병훈;최정미
    • Journal of Biomedical Engineering Research
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    • v.15 no.2
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    • pp.135-142
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    • 1994
  • This paper presents average method to detect Visual-Transient Evoked Potential from the human scalp electric potential measured by the ElectroEncephaloGram. To confirm the validity of average method, the average-process is performed with both stimulated and no-stimulated potentials respectively, and both results are compared. The specific waveform, which is visual-transient evoked potential, is produced only in the case of stimulated potential. It was found that a dc-drift, due to instrumentation errors and other noises, can produce significant changes in the evoked-potential waveform. This can be removed with a high-pass filter (cut-off frequency=0.5Hz).

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Development of a High-Performance Bipolar EEG Amplifier for CSA System (CSA 시스템을 위한 양극 뇌파증폭기의 개발)

  • 유선국;김창현;김선호;김동준
    • Journal of Biomedical Engineering Research
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    • v.20 no.2
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    • pp.205-212
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    • 1999
  • When we want to observe and record a patient's EEG in an operating room, the operation of electrosurgical unit(ESU) causes undesirable artifacts with high frequency and high voltage. These artifacts make the amplifiers of the conventional EEG system saturated and prevent the system from measuring the EEG signal. This paper describes a high-performance bipolar EEG amplifier for a CSA (compressed spectral array ) system with reduced ESU artifacts. The designed EEG amplifier uses a balanced filter to reduce the ESU artifacts, and isolates the power supply and the signal source of the preamplifier from the ground to cut off the current from the ESU to the amplifier ground. To cancel the common mode noise in high frequency, a high CMRR(common mode rejection ratio) diffferential amplifier is used. Since the developed bipolar EEG amplifier shows high gain, low noise, high CMRR, high input impedance, and low thermal drift, it is possible to observe and record more clean EEG signals in spite of ESU operation. Therefore the amplifier may be applicable to a high-fidelity CSA system.

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Analysis of Double Gate MOSFET characteristics for High speed operation (초고속 동작을 위한 더블 게이트 MOSFET 특성 분석)

  • 정학기;김재홍
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.2
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    • pp.263-268
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    • 2003
  • In this paper, we have investigated double gate (DG) MOSFET structure, which has main gate (NG) and two side gates (SG). We know that optimum side gate voltage for each side gate length is about 3V in the main gate 50nm. Also, we know that optimum side gate length for each for main gate length is about 70nm. DG MOSFET shows a small threshold voltage roll-off. From the I-V characteristics, we obtained IDsat=550$mutextrm{A}$/${\mu}{\textrm}{m}$ at VMG=VDS=1.5V and VSG=3.0V for DG MOSFET with the main gate length of 50nm and the side gate length of 70nm. The subthreshold slope is 86.2㎷/decade, transconductance is 114$mutextrm{A}$/${\mu}{\textrm}{m}$ and DIBL (Drain Induced Barrier Lowering) is 43.37㎷. Then, we have investigated the advantage of this structure for the application to multi-input NAND gate logic. Then, we have obtained very high cut-off frequency of 41.4GHz in the DG MOSFET.

A Capacitor-Charging Power Supply Using a Series-Resonant Three-Level Inverter Topology

  • Song I. H.;Shin H. S.;Choi C. H.
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.301-303
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    • 2001
  • In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.

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Studies on the deposition of ${Si_3}{N_4}$ for the passivation of PHEMT's (PHEMT Passivation을 위한 ${Si_3}{N_4}$)

  • Sin, Jae-Wan;Park, Hyeon-Chang;Park, Hyeong-Mu;Lee, Jin-Gu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.1
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    • pp.25-30
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    • 2002
  • In this paper, high quality silicon nitride film is achieved using Plasma Enhanced Chemical Deposition(PECVD) system, and applied in passivating PHEMT's. Passivated PHEMT's(60 ${\mu}{\textrm}{m}$$\times$2 fingers) showed an increase of 2.7 % and 3 % in the drain saturation current and the maximum transconductance, respectively. The current gain cut-off frequency of 53 ㎓ and maximum oscillation frequency of 105 ㎓ were obtained from the fabricated PHEMT's.

DC and RF Characteristics of $0.15{\mu}m$ Power Metamorphic HEMTs

  • Shim, Jae-Yeob;Yoon, Hyung-Sup;Kang, Dong-Min;Hong, Ju-Yeon;Lee, Kyung-Ho
    • ETRI Journal
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    • v.27 no.6
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    • pp.685-690
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    • 2005
  • DC and RF characteristics of $0.15{\mu}m$ GaAs power metamorphic high electron mobility transistors (MHEMT) have been investigated. The $0.15{\mu}m{\times}100{\mu}m$ MHEMT device shows a drain saturation current of 480 mA/mm, an extrinsic transconductance of 830 mS/mm, and a threshold voltage of -0.65 V. Uniformities of the threshold voltage and the maximum extrinsic transconductance across a 4-inch wafer were 8.3% and 5.1%, respectively. The obtained cut-off frequency and maximum frequency of oscillation are 141 GHz and 243 GHz, respectively. The $8{\times}50{\mu}m$ MHEMT device shows 33.2% power-added efficiency, an 18.1 dB power gain, and a 28.2 mW output power. A very low minimum noise figure of 0.79 dB and an associated gain of 10.56 dB at 26 GHz are obtained for the power MHEMT with an indium content of 53% in the InGaAs channel. This excellent noise characteristic is attributed to the drastic reduction of gate resistance by the T-shaped gate with a wide head and improved device performance. This power MHEMT technology can be used toward 77 GHz band applications.

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Comparison of Electrical Characteristics of SiGe pMOSFETs Formed on Bulk-Si and PD-SOI (Bulk-Si와 PD-SOI에 형성된 SiGe p-MOSFET의 전기적 특성의 비교)

  • Choi, Sang-Sik;Choi, A-Ram;Kim, Jae-Yeon;Yang, Jeon-Wook;Han, Tae-Hyun;Cho, Deok-Ho;Hwang, Yong-Woo;Shim, Kyu-Hwan
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.6
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    • pp.491-495
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    • 2007
  • This paper has demonstrated the electrical properties of SiGe pMOSFETs fabricated on both bulk-Si and PD SOI substrates. Two principal merits, the mobility increase in strained-SiGe channel and the parasitic capacitance reduction of SOI isolation, resulted in improvements in device performance. It was observed that the SiGe PD SOI could alleviate the floating body effect, and consequently DIBL was as low as 10 mV/V. The cut-off frequency of device fabricated on PD SOI substrate was roughly doubled in comparison with SiGe bulk: from 6.7 GHz to 11.3 GHz. These experimental result suggests that the SiGe PD SOI pMOSFET is a promising option to drive CMOS to enhance performance with its increased operation frequency for high speed and low noise applications.

Analysis and Control of NPC-3L Inverter Fed Dual Three-Phase PMSM Drives Considering their Asymmetric Factors

  • Chen, Jian;Wang, Zheng;Wang, Yibo;Cheng, Ming
    • Journal of Power Electronics
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    • v.17 no.6
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    • pp.1500-1511
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    • 2017
  • The purpose of this paper is to study a high-performance control scheme for neutral-point-clamping three-level (NPC-3L) inverter fed dual three-phase permanent magnet synchronous motor (PMSM) drives by considering some asymmetric factors such as the non-identical parameters in phase windings. To implement this, the system model is analyzed for dual three-phase PMSM drives with asymmetric factors based on the vector space decomposition (VSD) principle. Based on the equivalent circuits, PI controllers with feedforward compensation are used in the d-q subspace for regulating torque, where the cut-off frequency of the PI controllers are set at the twice the fundamental frequency for compensating both the additional DC component and the second order component caused by asymmetry. Meanwhile, proportional resonant (PR) controllers are proposed in the x-y subspace for suppressing the possible unbalanced currents in the phase windings. A dual three-phase space vector modulation (DT-SVM) is designed for the drive, and the balancing factor is designed based on the numerical fitting surface for balancing the DC link capacitor voltages. Experimental results are given to demonstrate the validity of the theoretical analysis and the proposed control scheme.