• Journal of Advanced Navigation Technology
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• v.22 no.6
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• pp.675-680
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• 2018

In this paper, we propose a hand gesture recognizer using restricted coulomb energy (RCE) neural network, and present hardware implementation results for real-time learning and recognition. Since RCE-NN has a flexible network architecture and real-time learning process with low complexity, it is suitable for hand recognition applications. The 3D number dataset was created using an FPGA-based test platform and the designed hand gesture recognizer showed 98.8% recognition accuracy for the 3D number dataset. The proposed hand gesture recognizer is implemented in Intel-Altera cyclone IV FPGA and confirmed that it can be implemented with 26,702 logic elements and 258Kbit memory. In addition, real-time learning and recognition verification were performed at an operating frequency of 70MHz.

• Journal of IKEEE
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• v.23 no.1
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• pp.207-213
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• 2019

In this paper, we propose a low-complexity feature detection algorithm for object tracking and present hardware architecture design and implementation results for real-time processing. The existing Shi-Tomasi algorithm shows good performance in object tracking applications, but has a high computational complexity. Therefore, we propose an efficient feature detection algorithm, which can reduce the operational complexity with the similar performance to Shi-Tomasi algorithm, and present its real-time implementation results. The proposed feature detector was implemented with 1,307 logic slices, 5 DSP 48s and 86.91Kbits memory with FPGA. In addition, it can support the real-time processing of 54fps at an operating frequency of 114MHz for $1920{\times}1080FHD$ images.

• Journal of Internet of Things and Convergence
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• v.8 no.6
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• pp.85-92
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• 2022

Demand for big data analysis and AI developers is increasing, but there is a lack of an education base to supply them. In this paper, by developing a cloud-based artificial intelligence education platform, the goal was to establish an environment in which practical practical training can be efficiently learned at low cost at educational institutions and IT companies. The development of the education platform was carried out by planning scenarios for each user, architecture design, screen design, implementation of development functions, and hardware construction. This training platform consists of a containerized workload, service management platform, lecture and development platform for instructors and students, and secured cloud stability through real-time alarm system and age test, CI/CD development environment, and reliability through docker image distribution. The development of this education platform is expected to expand opportunities to enter new businesses in the education field and contribute to fostering working-level human resources in the AI and big data fields.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.6A
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• pp.39-49
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• 2008

AEA and ARIA are next generation standard block cipher of US and Korea, respectively, and these algorithms are used in various fields including smart cards, electronic passport, and etc. This paper addresses the first efficient unified hardware architecture of AES and ARIA, and shows the implementation results with 0.25um CMOS library. We designed shared S-boxes based on composite filed arithmetic for both algorithms, and also extracted common terms of the permutation matrices of both algorithms. With the $0.25-{\mu}m$ CMOS technology, our processor occupies 19,056 gate counts which is 32% decreased size from discrete implementations, and it uses 11 clock cycles and 16 cycles for AES and ARIA encryption, which shows 720 and 1,047 Mbps, respectively.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.13 no.3
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• pp.27-34
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• 2003

Recently, an efficient hardware development for a cryptosystem is concerned. The efficiency of a multiplier for GF($2^n$)is directly related to the efficiency of some cryptosystem. This paper, considering the trade-off between time complexity andsize complexity, proposes a new multiplier architecture having n[n/2] AND gates and n([n/2]+1)- $$\Delta$_n$ = XOR gates, where $$\Delta$_n$=1 if n is even, $$\Delta$_n$=0 otherwise. This size complexity is less than that of existing ${multipliers}^{[5][12]}$which are $n^2$ AND gates and $n^2$-1 XOR gates. While a new multiplier is a serial-parallel multiplier to output a result of multiplication of two elements of GF($2^n$) after 2 clock cycles, the suggested multiplier is more suitable for some cryptographic device having space limitations.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.49 no.12
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• pp.1027-1035
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• 2021

We presents a design of 3U cubesat MIMAN (Monochrome imaging for monitoring aerosol by nano-satellite) for aerosol monitoring mission with high spatial resolution. The main objective of MIMAN mission is to take images of aerosols around Korea and to provide auxiliary data for GK 2B cloud masking. For this mission, we derived mission requirements and constraints for the MIMAN mission. We designed the mission architecture and concept of operations. To reduce risk factors in space operation, we considered the safety of the communication. In every operation modes, UHF communication is available so that the cubesat can operate based on the ground commands. So, we can handle every problem at the ground station during mission operations. Based on the mission and concept of operations, we confirmed that the system design satisfied the system requirements. We designed the system interface considering data flow of each hardware, and evaluated the safety of the system with system budget analysis.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.6
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• pp.1105-1114
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• 2021

Due to the recent surge in popularity of cryptocurrency, the threat of cryptojacking, a malicious code for mining cryptocurrencies, is increasing. In particular, web-based cryptojacking is easy to attack because the victim can mine cryptocurrencies using the victim's PC resources just by accessing the website and simply adding mining scripts. The cryptojacking attack causes poor performance and malfunction. It can also cause hardware failure due to overheating and aging caused by mining. Cryptojacking is difficult for victims to recognize the damage, so research is needed to efficiently detect and block cryptojacking. In this work, we take representative distinct symptoms of cryptojacking as an indicator and propose a new architecture. We utilized the K-Nearst Neighbors(KNN) model, which trained computer performance indicators as behavior-based dynamic analysis techniques. In addition, a K-means model, which trained the frequency of malicious script words for script similarity-based static analysis techniques, was utilized. The KNN model had 99.6% accuracy, and the K-means model had a silhouette coefficient of 0.61 for normal clusters.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.2
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• pp.61-66
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• 2023

As the use of smartphones expands to various areas and the level of multitasking increases, the support of swap is becoming increasingly important. However, swap support in smartphones is known to cause excessive storage traffic, resulting in memory thrashing. In this paper, we analyze how the thrashing of swaps that occurred in early smartphones has changed with the advancement of smartphone hardware. As a result of this analysis, we show that the swap thrashing problem can be resolved to some extent when the memory size increases. However, we also show that thrashing still occurs when the number of running apps continues to increase. Based on further analysis, we observe that this thrashing is caused by some hot data and suggest a way to solve this through an NVM-based architecture. Specifically, we show that a small size NVM with judicious management can resolve the performance degradation caused by smartphone swap.

• International conference on construction engineering and project management
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• 2022.06a
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• pp.1067-1074
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• 2022

An architect creates his/her design to meet owner's requirements. Floor plans, perspective drawings, and scale models are used in order for the owner to choose the design. The tools are a little helpful for communication between the architect and the owner in case the owner does not know architecture. The scale models are good, but it is hard to make scale models while design is in progress. 3D CAD is a good tool for communication, but it is time-consuming and requires high-performance computer hardware. Augmented reality is able to show 3D virtual models that are updated by the architect with smart devices such as a smart phone and a tablet PC. The owner frequently reviews the updated design anytime anywhere. This study proposes a method to use augmented reality for architectural design and construction management. The method supports the communication between the owner, the architect and the contractor to review updated designs, and to complete the building project. 3D models expressed in augmented reality are created using SketchUp with 2D drawings for building construction. An Android application implementing augmented reality is developed by Qualcomm Vuforia and Unity on smart devices. Drawings as markers and 3D models are connected in Unity. And functions that temporarily hide unnecessary parts can be implemented in C# programming language. If an owner, an architect, or a contractor looks at a smart phone on a 2D drawing, he/she can identify building elements such as 3D buildings or columns on a screen. This can help communication between them.

• The Bulletin of The Korean Astronomical Society
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• v.46 no.1
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• pp.39.1-39.1
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• 2021

The Local Volume Mapper(LVM) project in the fifth iteration of the Sloan Digital Sky Survey (SDSS-V) will produce large integral-field spectroscopic survey data to understand the physical conditions of the interstellar medium in the Milky Way, the Magellanic Clouds, and other local-volume galaxies. We are developing the LVM Instrument control software. The architecture design of the software follows a hierarchical structure in which the high-level software packages interact with the low-level and mid-level software and hardware components. We adopt the spiral software development model in which the software evolves by iteration of sequential processes, i.e., software requirement analysis, design, code generation, and testing. This spiral model ensures that even after being commissioned, the software can be revised according to new operational requirements. We designed the software by using the Unified Modeling Language, which can visualize functional interactions in structure diagrams. We plan to use the SDSS software framework CLU for the interaction between components, based on the RabbitMQ that implemented the Advanced Message Queuing Protocol (AMQP).