• Title/Summary/Keyword: hardware

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ISO 26262 의 하드웨어 ASIL 정량적 평가 절차

  • Kim, Gi-Yeong;Jang, Jung-Sun
    • Proceedings of the Korean Reliability Society Conference
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    • 2011.06a
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    • pp.271-279
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    • 2011
  • Automotive safety integrity level of hardware components can be achieved by satisfying quantitative and qualitative requirements. Based on ASIL, quantitative requirements are composed of hardware architectural metrics and evaluation of safety goal violations due to random hardware failures in ISO 26262. In this paper, the types of hardware failures will be defined and classified. Based on various metrics related with hardware failures, design essentials to achieve hardware safety integrity will be studied specifically. Issues associated with hardware development and assessment process are presented briefly.

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Hardware Implementation of Genetic Algorithm and Its Analysis (유전알고리즘의 하드웨어 구현 및 실험과 분석)

  • Dong, Sung-Soo;Lee, Chong-Ho
    • 전자공학회논문지 IE
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    • v.46 no.2
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    • pp.7-10
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    • 2009
  • This paper presents the implementation of libraries of hardware modules for genetic algorithm using VHDL. Evolvable hardware refers to hardware that can change its architecture and behavior dynamically and autonomously by interacting with its environment. So, it is especially suited to applications where no hardware specifications can be given in advance. Evolvable hardware is based on the idea of combining reconfigurable hardware device with evolutionary computation, such as genetic algorithm. Because of parallel, no function call overhead and pipelining, a hardware genetic algorithm give speedup over a software genetic algorithm. This paper suggests the hardware genetic algorithm for evolvable embedded system chip. That includes simulation results and analysis for several fitness functions. It can be seen that our design works well for the three examples.

A Study on Hardware Implementation of a VSB Equalization System (VSB 등화시스템의 하드웨어 구현방법에 관한 연구)

  • 채승수;박래홍
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.10
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    • pp.1314-1325
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    • 1995
  • In this paper, we describe hardware implementation of VSB (Vestigial SideBand) mo-dulation equalization systems for HDTV (High Definition TeleVision). By modifying an adaptive equalization algorithm, we propose a hardware architecture with a low hardware cost and the performance close to floating-point operations. We also employ the pipeline concept to reduce the hardware cost. The effectiveness of the proposed hardware architecture is de- monstrated through computer simulation and the optimization result of VHDL circuit descriptions.

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A Study on Embodiment of Evolving Cellular Automata Neural Systems using Evolvable Hardware

  • Sim, Kwee-Bo;Ban, Chang-Bong
    • Journal of the Korean Institute of Intelligent Systems
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    • v.11 no.8
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    • pp.746-753
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    • 2001
  • In this paper, we review the basic concept of Evolvable Hardware first. And we examine genetic algorithm processor and hardware reconfiguration method and implementation. By considering complexity and performance of hardware at the same time, we design genetic algorithm processor using modularization and parallel processing method. And we design frame that has connection structure and logic block on FPGA, and embody reconfigurable hardware that do so that this frame may be reconstructed by RAM. Also we implemented ECANS that information processing system such as living creatures'brain using this hardware reconfiguration method. And we apply ECANS which is implemented using the concept of Evolvable Hardware to time-series prediction problem in order to verify the effectiveness.

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Hardware Abstraction Architecture for Low Cost Flash Memories in Wireless Sensor Nodes (무선 센서 노드상의 저가형 플래시 메모리를 위한 하드웨어 추상화 구조)

  • Kim, Chang-Hoon;Kwon, Young-Jik
    • Journal of Korea Society of Industrial Information Systems
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    • v.14 no.2
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    • pp.72-80
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    • 2009
  • In this parer, we propose a hardware abstraction architecture(HAA) for low cost flash memories that can be applicable to wireless sensor nodes. The proposed HAA consists of three layers. The three layers are 1) HHL(Hardware Interlace Layer), HAL(Hardware Adaption Layer), and HPL(Hardware Presentation Layer), where HIL provides a platform independent interlace to applications of upper layers, HAL performs hardware resource management, program status control, and generation of logical instructions as main core of the HAA, and HPL initializes hardware and communicates data between MCU and flash memory. We implemented our HAA on AT45DB flash memory, and the HAA used 4,384 bytes program memory and 195 bytes data memory respectively. Since the proposed HAA is composed of well defined three layers and shows a low utilization of memory, it can provides a high efficiency in terms of flexibility, scalability, and re-usability, and thus the HAA is well suited for wireless sensor nodes.

A Study on Horizontal Displacement Following Ability of Welded and Non-welded Building Hardware (용접형과 무용접형 하지철물의 수평변위 추종능력에 관한 연구)

  • Lee, Don-Woo;Kwak, Eui-Shin;Shon, Su-Deok;Lee, Seung-Jae
    • Journal of Korean Association for Spatial Structures
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    • v.16 no.4
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    • pp.75-82
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    • 2016
  • Building hardware joints are welded in most cases, which have risks of fire and explosion. Besides, the secondary damage of the destruction of the welded parts can be caused by the horizontal displacement of the structure due to earthquake or wind load. This paper compared the horizontal displacement following abilities of welded building hardware and non-welded building hardware. To do this, We conducted actual formation shake table test, and checked on the horizontal displacement following ability of structure by comparing their responses to earthquake load. We made the 2m-high framework to examine the responses of the actually constructed building hardwares, and analyzed the displacement responses of the welded-typed, non-welded-typed, and cruciform bracket building hardwares. We conducted the test by increasing acceleration rate until displacement reached 40mm corresponding to allowable relative story displacement II. The result of the test showed that the building hardware using welding work made cracking and breakage on welded connections of welded building hardware, but non-welded building hardware with no use of welding work and cruciform bracket building hardware make no problem, and that non-welded building hardware is superior to that of the welded building hardware in the horizontal displacement following ability due to earthquake or wind load.

A Framework for Product Development including HW and SW Components (하드웨어와 소프트웨어가 포함된 제품개발을 위한 프레임워크)

  • Do Nam-Cheol;Chae Gyeong-Seok
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2006.05a
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    • pp.1329-1333
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    • 2006
  • This paper proposes a framework for product development including hardware and software components. The framework provides separation of the hardware dependent software, an integrated product development process, and integration of software components with product configurations and product structures. In order to separates the hardware dependent software, the framework considers product configuration modules and engineering changes of associated hardware and software components. The proposed product development process integrates development of the hardware dependent software into the existing product development process. In order to integrates the hardware dependent software with product configurations and product structures, the framework represents software components by existing product data models in Product Data Management (PDM). The framework is applied to development of a robot system including hardware and software components in order to show its effectiveness.

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A Product Data Model for the Integration Module for Supporting Collaborations on Hardware and Software Development (소프트웨어 하드웨어 협동설계를 위한 통합모듈을 지원하는 제품자료모델)

  • Do, Namchul
    • Journal of Information Technology Services
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    • v.11 no.4
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    • pp.171-180
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    • 2012
  • Since software and hardware integration has became a strategic tool for companies to innovate their products, an information system that can comprehensively manage software and hardware integrated product development is critical for the current product development. This paper proposed a product data model that can support modules of related software and hardware parts in Product Data Management(PDM) integrated with Software Configuration Management(SCM). The model allows engineers to define software and hardware product structure independently, and support the integration module that can summon related software and hardware parts to build a comprehensive module for collaboration. Through the integration module, engineers can identify and examine the effectiveness of their design alternatives to other related parts form different disciplines. The product data model was implemented as a prototype PDM system and tested with an example robotics product.

Trends of Hardware-based Trojan Detection Technologies (하드웨어 트로이목마 탐지기술 동향)

  • Choi, Y.S.;Lee, S.S.;Choi, Y.J.;Kim, D.W.;Choi, B.C.
    • Electronics and Telecommunications Trends
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    • v.36 no.6
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    • pp.78-87
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    • 2021
  • Information technology (IT) has been applied to various fields, and currently, IT devices and systems are used in very important areas, such as aviation, industry, and national defense. Such devices and systems are subject to various types of malicious attacks, which can be software or hardware based. Compared to software-based attacks, hardware-based attacks are known to be much more difficult to detect. A hardware Trojan horse is a representative example of hardware-based attacks. A hardware Trojan horse attack inserts a circuit into an IC chip. The inserted circuit performs malicious actions, such as causing a system malfunction or leaking important information. This has increased the potential for attack in the current supply chain environment, which is jointly developed by various companies. In this paper, we discuss the future direction of research by introducing attack cases, the characteristics of hardware Trojan horses, and countermeasure trends.

Implementation of FPGA for Efficient Ray Tracing Hardware Supporting Dynamic Scenes (동적 장면을 지원하는 효율적인 광선 추적 하드웨어에 대한 FPGA상에서의 구현)

  • Lee, Jin Young;Kim, Cheong Ghil;Park, Woo-Chan
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.4
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    • pp.23-26
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    • 2022
  • In this paper, our ray tracing hardware is implemented on the latest high-capacity FPGA board. The system included ray tracing hardware for rendering and tree building hardware for handling dynamic scenes. The FPGA board used in the implementation is a Xilinx Alveo U250 accelerator card for data centers. This included 12 ray tracing hardware cores and 1 tree-building hardware core. As a result of testing in various scenes in Full HD resolution, the FPS performance of the proposed ray tracing system was measured from 8 to 28. The overall average is about 17.7 FPS.