• Journal of Korea Society of Digital Industry and Information Management
• /
• v.17 no.2
• /
• pp.13-20
• /
• 2021

Placement is a very important step in the VLSI physical design process. It is the problem of placing circuit modules to optimize the circuit performance and reliability of the circuit. It is used at the layout level to find strongly connected components that can be placed together in order to minimize the layout area and propagation delay. The most popular algorithms for circuit placement include the cluster growth, simulated annealing, integer linear programming and genetic algorithm. In this paper we propose a adapted genetic algorithm searching solution space for the placement problem, and then compare it with simulated annealing and genetic algorithm by analyzing the results of each implementation. As a result, it was found that the adaptive genetic algorithm approaches the optimal solution more effectively than the simulated annealing and genetic algorithm.

• The Journal of the Korea Contents Association
• /
• v.21 no.7
• /
• pp.164-170
• /
• 2021

In VLSI design, partitioning is a task of clustering objects into groups so that a given objective circuit is optimized. It is used at the layout level to find strongly connected components that can be placed together in order to minimize the layout area and propagation delay. The most popular algorithms for partitioning include the Kernighan-Lin algorithm, Fiduccia-Mattheyses heuristic and simulated annealing. In this paper, we propose a adapted genetic algorithm searching solution space for the circuit partitioning problem, and then compare it with simulated annealing and genetic algorithm by analyzing the results of implementation. As a result, it was found that an adaptive genetic algorithm approaches the optimal solution more effectively than the simulated annealing and genetic algorithm.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.62 no.2
• /
• pp.177-183
• /
• 2013

We describe a new method for selecting design variables for shape optimization of high-voltage gas circuit breaker using a Kriging meta-model and a genetic algorithm. Firstly we sample balance design variables using the Latin Hypercube Sampling. Secondly, we build meta-model using the Kriging. Thirdly, we search the optimal design variables using a genetic algorithm. To obtain the more exact design variable, we adopt the boundary shifting method. With the proposed optimization frame, we can get the improved interruption design and reduce the design time by 80%. We applied the proposed method to the optimization of multivariate optimization problems as well as shape optimization of a high - voltage gas circuit breaker.

• Journal of Advanced Marine Engineering and Technology
• /
• v.22 no.5
• /
• pp.687-692
• /
• 1998

Test pattern generation is one of most difficult problems encountered in automating the design of logic circuits. The goal is to obtain the highest fault coverage with the minimum number of test patterns for a given circuit and fault set. although there have been many deterministic algorithms and heuristics the problem is still highly complex and time-consuming. Therefore new approach-es are needed to augment the existing techniques. This paper considers the problem of test pattern improvement for combinational circuits as a restricted subproblem of the test pattern generation. The problem is to maximize the fault coverage with a fixed number of test patterns for a given cir-cuit and fault set. We propose a new approach by use of a genetic algorithm. In this approach the genetic algorithm evolves test patterns to improve their fault coverage. A fault simulation is used to compute the fault coverage of the test patterns Experimental results show that the genetic algorithm based approach can achieve higher fault coverages than traditional techniques for most combinational circuits. Another advantage of the approach is that the genetic algorithm needs no detailed knowledge of faulty circuits under test.

• Journal of Multimedia Information System
• /
• v.7 no.2
• /
• pp.165-174
• /
• 2020

This document outlines a new color image encryption technology development. After splitting the original image into 240-bit blocks and modifying the first block by an initialization vector, an improved Feistel circuit is applied, sponsored by a genetic crossover operator and then strong chaining between the encrypted block and the next clear block is attached to set up the confusion-diffusion and heighten the avalanche effect, which protects the system from any known attack. Simulations carried out on a large database of color images of different sizes and formats prove the robustness of such a system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.20 no.6
• /
• pp.81-86
• /
• 2006

Routing signal lines in PCB, line shapes would be straight or bent. time-domain and frequency-domain evaluation of the signal property and interference are archived by precise Modeling of differential signal line. Some of CAD tools can extract equivalent circuit model parameters. but it takes a long time and heavy loads. This paper introduces a basic RLC equivalent circuit model parameter extraction technique for bent differential structures using genetic algorithm by this technique, we can model equivalent circuit of bent differential structures more faster.

• Journal of the Institute of Convergence Signal Processing
• /
• v.2 no.4
• /
• pp.97-102
• /
• 2001

In computer-aided design, partitioning is task of clustering objects into groups to that a given objection function is optimized It is used at the layout level to fin strongly connected components that can be placed together in order to minimize the layout area and propagation delay. Partitioning can also be used to cluster variables and operation into groups for scheduling and unit selection in high-level synthesis. The most popular algorithms partitioning include the Kernighan-Lin algorithm Fiduccia-Mattheyses heuristic and simulated annealing In this paper we propose a genetic algorithm searching solution space for the circuit partitioning problem. and then compare it with simulated annealing by analyzing the results of implementation.

• Proceedings of the KIEE Conference
• /
• 1999.07g
• /
• pp.2944-2946
• /
• 1999

In this paper, digital circuit evolution is proposed as an intrinsic evolvable system. Evolutionary hardware is a reconfigurable one which adapt itself to the environment and evolve its structure to realize desired performance. By using special FPGA and genetic algorithm, we have made a prototype of intrinsic hardware evolution system. As an example for digital circuit evolution, full adder realization is performed. As the result of this, a very complex structure of digital circuit performing full adder was created. Analysis made on the hardware revealed that some undetermined circuits were developed.

• Journal of Electrical Engineering and Technology
• /
• v.4 no.3
• /
• pp.360-364
• /
• 2009

This paper suggests the techniques in determining the values of the steady-state equivalent circuit parameters of a three-phase induction machine using genetic algorithm. The parameter estimation procedure is based on the steady-state phase current versus slip and input power versus slip characteristics. The propose estimation algorithm is of non-linear kind based on selection in genetic algorithm. The machine parameters are obtained as the solution of a minimization of objective function by genetic algorithm. Simulation shows good performance of the propose procedures.

• ETRI Journal
• /
• v.22 no.1
• /
• pp.38-46
• /
• 2000

The extraction of model parameters for embedded passive components is crucial for designing and characterizing the performance of multichip module (MCM) substrates. In this paper, a method for optimizing the extraction of these parameters using genetic algorithms is presented. The results of this method are compared with optimization using the Levenberg-Marquardt (LM) algorithm used in the HSPICE circuit modeling tool. A set of integrated resistor structures are fabricated, and their scattering parameters are measured for a range of frequencies from 45 MHz to 5 GHz. Optimal equivalent circuit models for these structures are derived from the s-parameter measurements using each algorithm. Predicted s-parameters for the optimized equivalent circuit are then obtained from HSPICE. The difference between the measured and predicted s-parameters in the frequency range of interest is used as a measure of the accuracy of the two optimization algorithms. It is determined that the LM method is extremely dependent upon the initial starting point of the parameter search and is thus prone to become trapped in local minima. This drawback is alleviated and the accuracy of the parameter values obtained is improved using genetic algorithms.