• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.11
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• pp.987-993
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• 2003

We fabricated thick film monopole antennas using Mo-doped BiNbO$_4$ ceramics and investigated their electrical properties as a function of the Mo-doping concentration. Compared with undoped BiNbO$_4$ ceramics, 10 at.% Mo-doping improved microwave dielectric properties of ceramics by increased sintered density as well as decreased space charge density. Further increase in the Mo-doping concentration caused formation of Bi$_2$MoO$_{6}$ phases, resulting in deterioration of the microwave characteristics. The gain and bandwidth of the ceramic monopole antenna were also greatly affected by the Mo-doping concentration. When Mo-doping concentration was 10 at.%, highest gain of -0.7dBi with lowest bandwidth of 30% at 2.3GHz was obtained.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1673-1681
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• 2015

A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.146-153
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• 2008

In this paper, a integrated phase-locked loop(PLL) as a clock multiphase generator for a high speed serial link is designed. The designed PLL keeps the same bandwidth and damping factor by using programmable current mirror in the whole operation frequency range. Also, the close-loop transfer function and VCO's phase-noise transfer function of the designed PLL are obtained with circuit netlists. The self impedance on board-mounted chip is calculated according to sizes and positions of decoupling capacitors. Especially, the detailed self-impedance analysis is carried out between frequency ranges represented the maximum gain in the close-loop transfer function and the maximum gain in the VCO's phase noise transfer function. We shows PLL's jitter characteristics by decoupling capacitor's sizes and positions from this result. The designed PLL has the wide operating range of 0.4GHz to 2GHz in operating voltage of 1.8V and it is designed 0.18-um CMOS process. The reference clock is 100MHz and PLL power consumption is 17.28mW in 1.2GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.9
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• pp.881-887
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• 2011

In this paper, we proposed vertically structured radiator for increasing bandwidth and gain of mobile phone internal antenna. The proposed antenna has vertically structured radiator instead of planar structured radiator to improve the antenna characteristics for GSM850/900 and DCS1800/PCS1900 bands. The antenna improve bandwidth of low band with 28 % than planar structured radiator. and also, improve bandwidth of high band with 14 %, efficiency 31.80~86.36 %, average gain -4.956~-0.617 dBi on the GSM850/900 and DCS1800/PCS1900 bands. These results are good performance among the small antenna with vertically structured radiator for increasing bandwidth and gain.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.05a
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• pp.59-60
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• 2017

In this paper, the bandwidth and gain enhancement of a series-fed dipole pair antenna (SDPA) using a modified balun., a director, and two parasitic patches is studied. The proposed SDPA consists of two strip dipoles with different lengths, a ground reflector, which are connected through a coplanar strip line, a director, and two parasitic patches. The modified balun is used to increase the bandwidth, whereas the director and two parasitic patches are appended to the SDPA to enhance the gain in the middle and high frequency band. A prototype of the proposed SDPA is fabricated on an FR4 substrate, and the experimental results show that the antenna has a frequency band of 1.56-3.10 GHz for a VSWR < 2, and measured gain maintains over 7 dBi in the frequency range of 1.55-3.00 GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.8
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• pp.1159-1168
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• 1993

The Switched-Capacitor Integrator(SCI) is a basic building block of Switched-Scpacitor Filter(SCF). But owing to the errors from the finite gain and bandwidth of op-amp on SCI, the most of SCP are limited to their applications. Although many of the compensation methods developed for active RC filters can be directly adapted to SCF, this is not true for the analysis of the effects of the op-amp dynamics on the filter response. The effect of finite op-amp gain is similar to the active RC filters. But SCF is more toter-ant of the finite op-amp bandwidth. In this paper, we have considered the errors of the finite gain and bandwidth of op-amp on SCI , and presented the simple and effective methods of compensating the errors of SCI due to the finite op-amp gain using the buffer circuit.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.8
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• pp.105-111
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• 2004

In this paper, millimeter-wave high gain and broadband MHEMT cascode amplifiers were designed and fabricated. The 0.1 ${\mu}{\textrm}{m}$ InGaAs/InAlAs/GaAs Metamorphic HEMT was fabricated for cascode amplifiers. The DC characteristics of MHEMT are 640 mA/mm of drain current density, 653 mS/mm of maximum transconductance. The current gain cut-off frequency(f$_{T}$) is 173 GHz and the maximum oscillation frequency(f$_{max}$) is 271 GHz. By using the CPW transmission line, the cascode amplifier was designed the matched circuit for getting the broadband characteristics. The designed amplifier was fabricated by the MHEMT MIMIC process that was developed through this research. As the results of measurement, the 1 stage amplifier obtained 3 dB bandwidth of 37 GHz between 31.3 to 68.3 GHz. Also, this amplifier represents the S21 gain with the average 9.7 dB gain in bandwidth and the maximum gain of 11.3 dB at 40 GHz. The 2 stage amplifier has the broadband characteristics with 3 dB bandwidth of 29.5 GHz in the frequency range from 32.5 to 62.0 GHz. The 2 stage cascode amplifier represents the high gain characteristics with the average gain of 20.4 dB in bandwidth and the maximum gain of 22.3 dB at 36.5 GHz.z.z.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.7
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• pp.1214-1221
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• 2006

Header compression scheme is suggested as a solution to reduce the inefficient overhead of general packet stream data. Especially, it is shown that there are more overhead rate for real-time media stream links such as voice because of its short payload size, and it is possible to get higher bandwidth efficiency using the header compression scheme. There are two kinds of error recovery in header compression such as Periodic Header Refresh(PHR) and Header Request(HR) schemes. In this paper, we analyze the performance of these two compression recovery schemes, and some results such as the overhead rate, bandwidth gain and bandwidth efficiency(BE) are presented.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.11 no.3
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• pp.9-15
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• 2011

The microstrip reflectarray antenna is rapidly becoming an attractive alternative solution to the traditional parabolic reflector antenna. However, the bandwidth of the microstrip reflectarray using the single layer structure is very narrow. To obtain wide bandwidth characteristic, the microstrip reflectarray using the multi-layer structure has been used, but it has some disadvantages such as high cost and complicated design. In this paper, to obtain low cost and wide bandwidth, the microstrip reflectarray antenna composed of square patch with two U-slots using the single-layer structure is proposed. The proposed antenna demonstrate radiation efficiency closed to 55.5 % and 1 dB gain bandwidth over 14 % at 12.5 GHz.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.341-344
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• 2000

There are many researches to increase bandwidth of the microstrip patch antenna for wireless LAN. In spite of broad bandwidth, Bow-Tie microstrip patch antenna, broadband microstrip patch antenna, has disadvantages that are low gain and big size. In this paper, stacked Bow-Tie microstrip patch antenna for wireless LAN is designed in 5.725～5.825GHz band. This antenna has characteristics that are broadband bandwidth, high gain and small size compared with microstrip patch antenna. In simulated results, the return loss is -34.2dB at 5.78GHz and bandwidth is 11.345% for VSWR is 2:1 and 7.75% for VSWR is 1.5:1. In measured results, the return loss is -38-45dB at 5.78GHz and bandwidth is 13% for VSWR is 2:1 and 5.6% for VSWR is 1.5:1.