• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.128-133
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• 2008

Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.

• Journal of Broadcast Engineering
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• v.12 no.1 s.34
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• pp.53-60
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• 2007

A Digital Broadcasting Satellite (DBS) receiver converts digital A/V streams received from a satellite to analog NTSC A/V signals in real-time. Multi-tasking is an efficient way to improve the utilization of the processor core in real-time applications. In this paper, we propose a hybrid approach with a balanced trade-off between hardware kernel and multi-tasking programming to increase a system throughput. First, the schedulability of the critical hard real-time tasks in the DBS receiver is verified by using a simple feasibility test. Then, several soft real-time tasks are thoughtfully programmed to satisfy functional requirements of the system.

• KIISE Transactions on Computing Practices
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• v.23 no.8
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• pp.459-465
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• 2017

Although the performance of computer hardware is increasing due to the development of manycore technologies, software lacking a proportional increase in throughput. Functional languages can be a viable alternative to improve the performance of parallel programs since such languages have an inherent parallelism in evaluating pure expressions without side-effects. Specifically, Haskell is notably popular for parallel programming because it provides easy-to-use parallel constructs based on monads. However, the scalability of parallel programs in Haskell tends to fluctuate as the number of cores increases, and the garbage collector is suspected to be the source of this fluctuations because it affects both the space and the time needed to execute the programs. This paper uses the tuning tool, GC-Tune, to improve the scalability of the performance. Our experiment was conducted with a parallel plagiarism detection program, and the scalability improved. Specifically, the fluctuation range of the speedup was narrowed down by 39% compared to the original execution of the program without any tuning.

• Journal of The Korean Association of Information Education
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• v.17 no.1
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• pp.43-52
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• 2013

As a tool of programming education, a robot is effective in creative problem solving abilities and logical thinking skills. It also provides practical, operational learning experience to learners, when using as a tool of learning, it can help learners' specific understanding for the contents of education and lead to an active participation in learning. This research focuses on the robot's instrumental use in the mathematics class. So the lesson activities with relation to the fourth grade math curriculum were developed after the functional analysis of the robot and the extraction of educational utilization with function. The result shows that there wasn't a significant difference in achievement test but there was a positive response in the most of the survey items. It shows that robots lead to an active participation in class, to be interested in math class and were helpful to understand math concepts. There was also a positive response in the result of learner interviews such as dynamic, collaborative communication, experiential, practical lessons that are rare sights in normal math class.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.4
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• pp.309-314
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• 2011

As a system becomes more complex, a design relies more heavily on a methodology based on high-level abstraction and functional verification. SystemVerilog includes characteristics of hardware design language and verification language in the form of extensions to the Verilog HDL. However, the OOP of System Veri log does not allow multiple inheritance. In this paper, we propose adoption of SystemC to introduce multiple inheritance. After being created, a SystemC unit is combined with a SystemVerilog-based verification environment using SystemVerilog DPI and ModelSim macro. Employing multiple inheritance of SystemC makes a design of a verification environment simple and easy through source code reuse. Moreover, a verification environment including SysemC unit has a benefit of reconfigurability due to OOP.

• Journal of the Korea Society of Computer and Information
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• v.22 no.1
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• pp.123-134
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• 2017

The ability to use information technology has become increasingly important as technological advances continue to sweep through the computing world, and education for improving computational thinking has become globally instituted. In South Korea, informatics subjects have been modified in the 2015 curriculum and are now compulsory in primary and secondary education. However, despite substantial financial investment and numerous studies promoting informatics education, there continues to be a serious lack of pre-service teachers capable of teaching computational thinking. This study investigated pre-service teacher programming education using App Inventor, their perceptions of App Inventor, and how use of the program affected teacher problem-solving abilities and self-efficacy. In the pre-test, the control group and experimental group showed no statistically significant difference; however, the post-test revealed that the two groups showed statistically significant differences in problem-solving skills and self-efficacy. The participants initially showed interest in using App Inventor; however, after practice-teaching and project-based learning, the participants demonstrated a growing negativity toward the program when they made errors and the functional limits of App Inventor became apparent. Although most participants stated that they would not use App Inventor in their classes, the positive statistically significant differences in problem-solving skills and self-efficacy indicate that this study could be utilized as a basis for building a teaching-learning program using App Inventor and creating an educational plan for teaching computational thinking.

• The KIPS Transactions:PartA
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• v.16A no.6
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• pp.453-462
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• 2009

Studies on software plagiarism detection, prevention and judgement have become widespread due to the growing of interest and importance for the protection and authentication of software intellectual property. Many previous studies focused on comparing all pairs of submitted codes by using attribute counting, token pattern, program parse tree, and similarity measuring algorithm. It is important to provide a clear-cut model for distinguishing plagiarism and collaboration. This paper proposes a source code clustering algorithm using a probability model on extreme value distribution. First, we propose an asymmetric distance measure pdist($P_a$, $P_b$) to measure the similarity of $P_a$ and $P_b$ Then, we construct the Plagiarism Direction Graph (PDG) for a given program set using pdist($P_a$, $P_b$) as edge weights. And, we transform the PDG into a Gumbel Distance Graph (GDG) model, since we found that the pdist($P_a$, $P_b$) score distribution is similar to a well-known Gumbel distribution. Second, we newly define pseudo-plagiarism which is a sort of virtual plagiarism forced by a very strong functional requirement in the specification. We conducted experiments with 18 groups of programs (more than 700 source codes) collected from the ICPC (International Collegiate Programming Contest) and KOI (Korean Olympiad for Informatics) programming contests. The experiments showed that most plagiarized codes could be detected with high sensitivity and that our algorithm successfully separated real plagiarism from pseudo plagiarism.

• KIPS Transactions on Computer and Communication Systems
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• v.6 no.9
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• pp.377-384
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• 2017

The performance improvement of a single core processor has reached its limit since the circuit density cannot be increased any longer due to overheating. Therefore, the multicore and manycore architectures have emerged as viable approaches and parallel programming becomes more important. Haskell, a purely functional language, is getting popular in this situation since it naturally supports parallel programming owing to its beneficial features including the implicit parallelism in evaluating expressions and the monadic tools supporting parallel constructs. However, the performance of Haskell parallel programs is strongly influenced by the performance of the run-time system including the garbage collector. Though a memory profiling tool namely GC-tune has been suggested, we need a more systematic way to use this tool. Since GC-tune finds the optimal memory size by executing the target program with all the different possible GC options, the GC-tuning time takes too long. This paper suggests a basic divide-and-conquer method to reduce the number of GC-tune executions by reducing the search area by one-quarter for every searching step. Applying this method to two parallel programs, a maximally independent set and a K-means programs, the memory tuning time is reduced by 7.78 times with accuracy 98% on average.

• The Transactions of the Korea Information Processing Society
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• v.3 no.4
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• pp.817-833
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• 1996

Most object-oriented analysis and design methodologies are based on structured analysis and information modeling and are using for intuitive analysis and design models based on object-oriented programming languages. Therefore there are many problems such as when a system is implemented incorrect semantics and inconsistency between models.This paper submits a decomposition and design method for object, dynamic and functional module of the methodology of a new system development life-cycle. Thus, we present a new system development life cycle, and suggestsa object-oriented design methodand standards of module decomposition for the decomposition of object, dynamic, functional models due to object-oriented design procedures and specifications. This proposed method enables developers to reflect user's software requirements conveniently. We prove the validity and practicality of this object-oriented design method through implementing a real-system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.7
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• pp.263-272
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• 2016

Modular product design has contributed to flexible product modification and development, production lead time reduction, and increasing product diversity. Modular product design aims to develop a product architecture that is composed of detachable modules. These modules are constructed by maximizing the similarity of components based on physical and functional interaction analysis among components. Accordingly, a systematic procedure for clustering the components, which is a main activity in modular product design, is proposed in this paper. The first phase in this procedure is to build a component-to-component correlation matrix by analyzing physical and functional interaction relations among the components. In the second phase, network flow modeling is applied to find clusters of components, maximizing their correlations. In the last phase, a network flow model formulated with linear programming is solved to find the clusters and to make them modular. Finally, the proposed procedure in this research and its application are illustrated with an example of modularization for a vacuum cleaner.