• Journal of the Society of Naval Architects of Korea
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• v.54 no.6
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• pp.501-514
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• 2017

In the previous research, a study was carried out to estimate the actual performance such as the propeller Revolution Per Minute (RPM) and engine power of a Liquefied Natural Gas Carrier (LNGC) using the full-scale measurement data. After the predicted RPM and engine power were verified by comparing those with the measured values, the suggested method was regarded to be acceptable. However, there was a limitation to apply the method on the prediction of the RPM and engine power of a ship. Since the information of route, speed, and environmental conditions required for estimating the RPM and engine power is generally regarded as the intellectual property of a shipping company, it is difficult to secure the information on a shipyard. In this paper, the RPM and engine power of the 151K LNGC was estimated using the combination of Automatic Identification System (AIS) and European Centre for Medium-Range Weather Forecasts (ECMWF) database in order to replace the full-scale measurement. The simulation approach, which was suggested in the previous research, was identically applied to the prediction of RPM and engine power. After the results based on the AIS and ECMWF database were compared with those obtained from the full-scale measurement data, the feasibility was briefly reviewed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.8C
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• pp.762-768
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• 2005

This paper proposes new space-time block codes achieving full rate and full diversity for QAM and quasi-static Rayleigh fading channels when using any number of transmit antennas larger than 3 transmit antennas. These codes are constructed by serially concatenating the constellation rotating $precoders^{[4,5]}$ with the Alamouti scheme$3^{[3]}$ Bike the conventional A-ST-CR code$^{[6,7]}$. Computer simulations show that the proposed codes achieve approximately 1.3dB, 1.4dB and 1.5dB larger coding gains than the ST-CR $codes^{[4,5]}$ for QPSK with 3, 4 and 5 transmit antennas, respectively, and about 3dB for 16QAM with 3 transmit antennas.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.12
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• pp.167-173
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• 2015

This paper presents a study on the Full-HD HEVC(High Efficiency Video Coding) encoder IP(Intellectual Property) design. The designed IP is for HEVC main profile 4.1, and performs encoding with a speed of 60 fps of full high definition. Before hardware and software design, overall reference model was developed with C language, and we proposed a parallel processing architecture for low-power consumption. And also we coded firmware and driver programs relating IP. The platform for verification of developed IP was developed, and we verified function and performance for various pictures under several encoding conditions by implementing designed IP to FPGA board. Compared to HM-13.0, about 35% decrease in bit-rate under same PSNR was achieved, and about 25% decrease in power consumption under low-power mode was performed.

• The Journal of Korean Institute of Information Technology
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• v.17 no.11
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• pp.17-26
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• 2019

RAID-5 technology is one of the choice for flash storage device to enhance its reliability. However, RAID-5 has inherent parity update overhead, especially, parity overhead for partial stripe write is one of the crucial issues for flash-based RAID-5 technologies. In this paper, we design efficient parity log architecture for RAID-5 to eliminate runtime partial parity overhead. During runtime, partial parity is retained in buffer memory until full stripe write completed, and the parity is written with full strip write. In addition, parity log is maintained in memory until whole the stripe group is used for data write. With this parity log, partial parity can be recovered from the power loss. In the experiments, the parity log method can eliminate partial parity writes overhead with a little parity log writes. Hence it can reduce write amplification at the same reliability.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.52-57
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• 2016

We introduce a hybrid scheduling in a multi-path poor scattering full-duplex (FD) system, which consists of one multi-antenna FD base station and a large number of single-antenna half-duplex mobile stations. Our hybrid scheduling utilizes partial channel state information at the transmitter. In particular, unlike the conventional scheduling method using opportunistic transmission for both uplink and downlink, the proposed scheme combines a random transmit beamforming for downlink and a zero forcing beamforming for uplink. As our main result, via computer simulations, it is shown that the proposed scheme has a superior sum-rate performance than that of the conventional scheduling method beyond a certain signal-to-noise ratio regime.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.43-49
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• 2014

In this paper, we consider the performance evaluation of space time block code (STBC)) with coordinate interleaved orthogonal design (CIOD) over time selective channel. In case of quasi static channel, STBC-CIOD satisfies full rate and full diversity (FRFD) property with the single symbol decoding. However in the time selective channel, the symbol interference degrades the system performance when we employ the single symbol decoding. We derive the union bound of the symbol error probability by evaluating the pairwise error probability in the first order Markov channel. We also present simulation results of STBC-CIOD with QPSK.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.830-833
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• 2007

In this paper, we implemented a $17{\times}17b$ binary digital multiplier using radix-4 Booth;s algorithmand proposed an efficient testing methodology for the full-custom design. A two-stage pipeline architecture was applied to achieve higher throughput and 4:2 adders were used for regular layout structure in the Wallace tree partition. Several chips were fabricated using LG Semicon 0.6-um 3-Metal N-well CMOS technology. We did fault simulations efficiently using the proposed test method resulting in the reduction of the number of faulty nodes by 88%. The chip contains 9115 transistors and the core area occupies $1135^*1545$ mm2. The functional tests using ATS-2 tester showed that it can operate with 24 MHz clock at 5.0 V at room temperature.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.11
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• pp.2613-2620
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• 2014

In this paper, we consider a full duplexing (FD) wireless cellular network where a central base station (BS) works in the FD mode while the downlink (DL) and uplink (UL) users work in the time division duplexing (TDD) mode. Since this FD system induces the inter-user interference from UL user to DL user, the main challenge for maximizing the system performances is user scheduling that makes a pair of DL user and UL user to use the same radio resource simultaneously. We formulate an optimization problem for user pairing to maximize the cell capacity and propose a suboptimal user scheduling algorithm with low complexity. This scheduling algorithm is designed in a way where the DL user with a better signal quality has a higher priority to choose its UL user that causes less interference. Simulation results show that the FD system using the proposed user scheduling algorithm achieves the optimal performance and significantly outperforms the conventional TDD system in terms of the cell capacity.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.11
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• pp.2576-2583
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• 2015

In a full-duplex (FD) wireless cellular network, uplink (UL) users induce the severe inter-user interference to downlink (DL) users. Therefore, a user scheduling that makes a pair of DL user and UL user to use the same radio resource simultaneously influences the system performances significantly. In this paper, we first formulate an optimization problem for user scheduling to minimize the occurrence of outage, aiming to guarantee the quality of service of users, and then we propose a suboptimal user scheduling algorithm with low complexity. The proposed scheduling algorithm is designed in a way where the DL user with a worse signal quality has a higher priority to choose its UL user that causes less interference. Simulation results show that the FD system using the proposed user scheduling algorithm achieves the optimal performance and significantly decreases the outage probability compared with the conventional half-duplex cellular system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.12
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• pp.1639-1645
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• 2020

In this paper, we propose a virtual full-duplex relaying scheme based on data ferrying using two unmanned aerial vehicles (UAVs). By utilizing high mobility of two UAVs, the proposed relaying scheme can make each UAV communicate with a source node or a destination node when the UAV is near the source node or the destination node. The proposed relaying scheme can overcome the performance limitations of the half-duplex relaying and the implementation constraints of the full-duplex relaying. In addition, we propose an algorithm to shift the center point of two UAVs' trajectory with consideration of inter-relay interference (IRI). We show the simulation results of our proposed trajectory's center point shift algorithm. From the simulation results, it is shown that our proposed relaying scheme can achieve higher end-to-end spectral efficiency (SE) than the conventional static relaying scheme.