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Divided Generation Algorithm of Universal Test Set for Digital CMOS VLSI (디지털 CMOS VLSI의 범용 Test Set 분할 생성 알고리듬)

  • Dong Wook Kim
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.11
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    • pp.140-148
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    • 1993
  • High Integration ratio of CMOS circuits incredily increases the test cost during the design and fabrication processes because of the FET fault(Stuck-on faults and Stuck-off faults) which are due to the operational characteristics of CMOS circuits. This paper proposes a test generation algorithm for an arbitrarily large CMOS circuit, which can unify the test steps during the design and fabrication procedure and be applied to both static and dynaic circuits. This algorithm uses the logic equations set for the subroutines resulted from arbitrarily dividing the full circuit hierarchically or horizontally. Also it involves a driving procedure from output stage to input stage, in which to drive a test set corresponding to a subcircuit, only the subcircuits connected to that to be driven are used as the driving resource. With this algorithm the test cost for the large circuit such as VLSI can be reduced very much.

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A Retrospection on Foundation Design of Taipei 101

  • Chin, Chung-Tien;Chao, Hsiao-Chou;Chang, Der-Wen
    • Proceedings of the Korean Geotechical Society Conference
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    • 2009.09a
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    • pp.145-156
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    • 2009
  • Large diameter bored pile was selected as the foundation type for Taipei 101. The pile construction method and specific construction procedures were determined based on the results of trial installation and pile load tests. The baseline for foundation design was established using the friction versus depth characteristics of each ground layer obtained from the pile load tests. As the ground profile and depth to the top of rock formation varied significantly on this site, the pile length, bearing capacity and settlement for single pile were analyzed using the information interpreted from adjacent boreholes. The post grouting at pile tip was mandatory for pile construction. Nevertheless, it was treated as a measure reducing the influence of construction uncertainties and providing extra safety for the foundation system.

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An EVOP Procedure Using the Relationship Between Defect Types and Process Variables of Injection Molding (사출성형의 불량유형과 공정변수 간의 상관관계를 이용한 EVOP 절차)

  • Byun, Jai-Hyun;Kim, Youg-Yun
    • IE interfaces
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    • v.12 no.1
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    • pp.26-31
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    • 1999
  • Evolutionary Operation(EVOP) is a method for continuously monitoring and improving a full-scale process to get an optimal operating condition while production is under way. To avoid appreciable changes in the product quality characteristics only small changes are made in the levels of the process variables. One of the reasons why EVOP is not so popular is that people in charge of the EVOP is blamed when the EVOP does not produce good results. We present an EVOP procedure when prior information of the relationship between defect types and process variables is known. The procedure is illustrated with an injection molding case study.

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Design and Implementation of Xcent-Net

  • Park, Kyoung;Hahn, Jong-Seok;Sim, Won-Sae;Hahn, Woo-Jong
    • Journal of Electrical Engineering and information Science
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    • v.2 no.6
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    • pp.74-81
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    • 1997
  • Xcent-Net is a new system network designed to support a clustered SMP called SPAX(Scalable Parallel Architecture based on Xbar) that is being developed by ETRI. It is a duplicated hierarchical crossbar network to provide the connections among 16 clusters of 128 nodes. Xcent-Net is designed as a packet switched, virtual cut-through routed, point-to-point network. Variable length packets contain up to 64 bytes of data. The packets are transmitted via full duplexed, 32-bit wide channels using source synchronous transmission technique. Its plesiochronous clocking scheme eliminates the global clock distribution problem. Two level priority-based round-robin scheme is adopted to resolve the traffic congestion. Clear-to-send mechanism is used as a packet level flow control scheme. Most of functions are built in Xcent router, which is implemented as an ASIC. This paper describes the architecture and the functional features of Xcent-Net and discusses its implementation.

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A CMOS Bridge Rectifier for HF and Microwave RFID Systems

  • Park Kwangmin
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.6
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    • pp.237-240
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    • 2004
  • In this paper, a CMOS bridge rectifier for HF and microwave RFID systems is presented. The proposed RFID CMOS bridge rectifier is designed with two NMOSs and two PMOSs whose gates are connected to the antenna, and it is operated as a full wave bridge rectifier. The simulation results obtained with SPICE show the well rectified and high enough DC output voltages for the operating frequencies of 13.56 MHz, 915 MHz, and 2.45 GHz which are used in various RFID systems. The obtained DC output voltages are sufficiently high for driving the low power microchip in RFID transponder for the frequency range of HF and microwave.

Accurate Position and Instantaneous Speed Observer for Motor Drive System using Novel Speed Estimator (속도 추정기를 이용한 전동기 구동 시스템의 정밀한 위치 및 순시 속도 관측기의 개발)

  • Kim, Hui-Uk;Kim, Yong-Seok;Seol, Seung-Gi
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.11
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    • pp.625-631
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    • 1999
  • In this paper, an accurate position control using new estimator which estimates the instantaneous speed and accurate position with a low precision shaft encoder is proposed. The overall performance of position control system is strongly depend on the accuracy of the position information and the performance of the speed controller in low speed range. In this paper the position and speed of the motor are obtained from Kalman filter which is an optimal full order estimator. This estimator has good performance even in very low speed range include standstill. The simulation and experimental results confirm the validity of the proposed estimation and control scheme.

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A Study on the Development of a Virtual Electrical Machine Lab System Using JAVA (JAVA를 이용한 전기기기 가상실험실 구축에 관한 연구)

  • Baek, Young-Chul;Lee, Min-No;Ho, Won
    • Proceedings of the KIEE Conference
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    • 1999.07a
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    • pp.197-199
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    • 1999
  • There have been great advances in communication and networking in recent times. It is necessary to take advantage of this information infrastructure for the purpose of developing an engineering education system. But the networking system was expensive and hard to develop. The current international netwoking is converging to the use of the World Wide Web system. It has become a new standard for global network communication. But there are not a great number of applications which take full advantage of this environment. In this paper, an interactive virtual electrical machine lab system using the World Wide Web will be presented. This can be used as a supplementary kit for engineering experiment of transformer, induction motor, direct current motor, and synchronous motor. The system is developed using JAVA and can be accessed using Web browsers.

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A Study on the Development of an Education and Design Package for Transformer and Induction Motor Using JAVA (JAVA를 이용한 변압기, 유도전동기, 교육 및 설계 패키지 개발에 관한 연구)

  • Kim, Gwang-Hun;Kim, Young-Min;Ho, Won
    • Proceedings of the KIEE Conference
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    • 1998.07a
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    • pp.312-315
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    • 1998
  • There have been great advances in communication and networking in recent times. It is necessary to take advantage of this information infrastructure for the purpose of developing an engineering education system. But the networking system was expensive or hard to develop. The current international networking is converging to the use of the World Wide Web system. It has become a new standard for global network communication. But there are not a great number of applications which take full advantage of this environment. In this paper an interactive education system for engineering education using the World Wide Web will be presented. This can be used as a supplementary kit for engineering education of transformer induction motor design. The system is developed using JAVA and can be accessed using Web browsers.

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Method of direct transaction with farmers, farmers group and consumers through internet (인터넷을 통한 농산물 생산자, 생산자단체와 소비자와의 직거래 방법(B2C))

  • Lee, Young-Hee;Kim, Chul-Ho
    • Korean Journal of Agricultural Science
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    • v.28 no.1
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    • pp.59-64
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    • 2001
  • This study is on the method of direct transaction with farmers, a farmers' group and consumers through internet. Approximately the method in this study could be divided into 4 sections: 1) full information display about agricultural products of farmers, farmers' group, 2) consumers' choice about the best stuff, 3) direct transaction system by using tele-banking and 4) a delivery system in conveying method or an interview type electronic commerce system that carry out the direct visit These methods are to make the merits of the existing traditional type commerce system's to be maximized to make bull use of electronic commerce system.

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Joint Beamforming and Jamming for Physical Layer Security

  • Myung, Jungho;Heo, Hwanjo;Park, Jongdae
    • ETRI Journal
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    • v.37 no.5
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    • pp.898-905
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    • 2015
  • In this paper, we consider a joint beamforming and jamming design to enhance physical layer security against potential multiple eavesdroppers in a multiple-input and single-output cellular broadcast channel. With perfect channel state information at the base station, we propose various design approaches to improve the secrecy of the target user. Among the proposed approaches, the combined beamforming of maximum ratio transmission and zero-forcing transmission with a combination of maximum ratio jamming and zero-forcing jamming (MRT + ZFT with MRJ + ZFJ) shows the best security performance because it utilizes the full transmit antenna dimensions for beamforming and jamming with an efficient power allocation. The simulation results show that the secrecy rate of this particular proposed approach is better than the rates of the considered conventional approaches with quality-of-service and outage probability constraints.