• The Journal of the Acoustical Society of Korea
• /
• v.24 no.8
• /
• pp.462-468
• /
• 2005

In this paper, we present a frame synchronization scheme for high oversampling rate based QPSK receiver system in the underwater acoustic burst transmission. The proposed frame synchronization scheme determines the frame synchronization by comparing a threshold value with the correlation between the received symbol sequence and rotated 16-symbol length CAZAC sequence, which is made by dividing into two 8-symbol length sequences and then concatenating the latter sequence and the former one. If the correlation value is bigger than the threshold value, the frame detector determines that the frame synchronization is achieved at that sample. Also, the approximated performance of designed frame detector is derived and it is well fit the simulated result.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.28 no.10A
• /
• pp.853-858
• /
• 2003

In the EUROCOM communication system, it defines frame structures as data rate. each frame includes a synchronization bit as frame alignment signal. In my paper proposes a FAS detector for determining state of synchronization as compare received data with FAS pattern, also presents a new detection method for synchronization secession which can decide acquisition state of synchronization with searching a synchronization channel through entire channels in frame.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.25 no.8
• /
• pp.859-866
• /
• 1988

A high speed frame synchronization system has been realized which generates the frame sync clock from 565Mb/s data stream (the DS-5 digital multiplex hierarchy signal). The design of a frame pattern detector using a parallel detection method brings into low speed operation and resolves the problems due to the high speed operation. The frame synchronization algorithm recommended by CCITT is also realized by designing a sync mode controller. Appropriate design procedures are considered for an efficient hardware design and minimized connection lines. The CAD simulation as well as experiment show that the performance of the newly designed frame synchronization system satisfies the relevant requirements.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
• /
• 2003.05a
• /
• pp.336-340
• /
• 2003

The frame synchronization should be acquired before performing other data-aided receiving algorithms, such as data-aided channel equalizing, beam-forming and phase, symbol timing, and frequency synchronizing, since all of them are using preamble or training sequence to estimate the amount of error from the received signal. In this paper, we present a new frame synchronization scheme for underwater ultrasonic image burst transmission system, which computes the correlation between received symbol sequence and one CAZAC sequence, composed of the latter half of the first CAZAC sequence of preamble and the first half of the second CAZAC sequence of preamble and then compares a threshold value. If the correlation value is bigger than the threshold value, the frame detector determines that the frame synchronization is achieved at that sample.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.2
• /
• pp.31-37
• /
• 2009

This paper presents an efficient frame synchronization strategy with the identification of modulation type for Digital Video Broadcasting-Satellite second generation (DVB-S2). To detect the Start Of Frame (SOF) and identify a modulation mode at low SNR, we propose a new correlator structure and a low complexity Automatic Gain Controller (AGC). The proposed frame synchronization architecture can reduce about 93% multipliers and 89% adders compared with the direct implementation of the Differential - Generalized Post Detection Integration (D-GPDI) algorithm which is very complex and the proposed a low complexity AGC consists of only 5 multipliers and 3 adders. The proposed architecture has been thoroughly verified on the Xilinx Virtex II FPGA board.

• Proceedings of the IEEK Conference
• /
• 1999.06a
• /
• pp.86-89
• /
• 1999

In this paper, we propose a new architecture of the fast symbol timing synchronization system which has some shared hardware blocks in order to reduce the hardware complexity. The proposed system consists of received power detector, correlation power detector using shared complex moving adders, and 2-step peak detector. Our system has detected FFT starting point within three Symbols using first two reference symbols of the frame in wireless ATM system. The new architecture was designed and simulated using VHDL. Our proposed architecture also detects a correct symbol timing synchronization within three symbols under a multi-path fading channel.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.37 no.1A
• /
• pp.73-81
• /
• 2012

In this paper, we propose a high-speed synchronization method for Digital Radio Mondiale (DRM) receivers. In order to satisfy the high-speed synchronization requirement of DRM receivers, the proposed method eliminate the initial sampling frequency synchronization process in conventional synchronization methods. In the proposed method, sampling frequency tracking is performed after integer frequency synchronization and frame synchronization. Different correlation algorithms are applied to detect the first frame of the Orthogonal Frequency Division Multiplexing (OFDM) demodulation symbol with sampling frequency offset (SFO). A frame detection algorithm that is robust to SFO is selected based on the performance analysis and simulation. Simulation results show that the proposed method reduces the time spent for initial sampling frequency synchronization even if SFO is present in the DRM signal. In addition, it is verify that inter-cell differential correlation used between reference cells is roubst to the effect of initial SFO.

• Journal of Communications and Networks
• /
• v.14 no.5
• /
• pp.501-509
• /
• 2012

This paper proposes a joint timing synchronization, channel estimation, and data detection for the impulse radio ultra-wideband systems. The proposed timing synchronizer consists of coarse and fine timing estimation. The synchronizer discovers synchronization points in two stages and performs adaptive threshold based on the maximum pulse averaging and maximum (MAX-PA) method for more precise synchronization. Then, iterative channel estimation is performed based on the discovered synchronization points, and data are detected using the selective rake (S-RAKE) detector employing maximal ratio combining. The proposed synchronizer produces two signals-the start signal for channel estimation and the start signal for start frame delimiter (SFD) detection that detects the packet synchronization signal. With the proposed synchronization, channel estimation, and SFD detection, an S-RAKE receiver with binary pulse position modulation binary phase-shift keying modulation was constructed. In addition, an IEEE 802.15.4a channel model was used for performance comparison. The comparison results show that the constructed receiver yields high performance close to perfect synchronization.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.13 no.6
• /
• pp.545-555
• /
• 2020

This paper presented efficient transceiver structure using sub-band processing for underwater communication in terms of covertness and performance improvement. In aspect of covertness, encrypted coded-bits are divided into groups, and center frequency and sub band are determined by coded-bits of each group. Therefore, as center frequencies are changed randomly, it maintain the covertness effectively. In aspect of performance improvement, the performance of underwater communication mainly depends on multi-path propagation characteristics, Doppler-spread, and frame synchronization. Accordingly, in order to overcome these effects, non-coherent energy detector and turbo equalization method are employed in receiver side. Furthermore, optimal frame synchronization was proposed. Through the simulation and lake experiment, performance analysis was conducted. Especially in the lake experiment, as a result of applying optimal frame synchronization method to receiver structure, errors are corrected in most frames.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.18 no.3
• /
• pp.215-221
• /
• 2018

In this paper, a comprehensive design of HBC(Human Body Communication) system for capsule endoscope is presented. First, we propose a method of combining the signals received from multiple patches attached to the body of patient through differential operation and derive the signal SNR mathematically. To synchronize HBC transmission signal sent from capsule, we analyzed coarse timing synchronization method using PN code and fine timing synchronization performance among Manchester, NRZ and RZ modulation method using ZCD(Zero Crossing Detector). In addition, we evaluated the equalization performance of HBC signal frame in Rician and Rayleigh channel environments by applying LMS and RLS algorithm.