• Title/Summary/Keyword: frame interpolation method

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Transform domain Wyner-Ziv Coding based on the frequency-adaptive channel noise modeling (주파수 적응 채널 잡음 모델링에 기반한 변환영역 Wyner-Ziv 부호화 방법)

  • Kim, Byung-Hee;Ko, Bong-Hyuck;Jeon, Byeung-Woo
    • Journal of Broadcast Engineering
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    • v.14 no.2
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    • pp.144-153
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    • 2009
  • Recently, as the necessity of a light-weighted video encoding technique has been rising for applications such as UCC(User Created Contents) or Multiview Video, Distributed Video Coding(DVC) where a decoder, not an encoder, performs the motion estimation/compensation taking most of computational complexity has been vigorously investigated. Wyner-Ziv coding reconstructs an image by eliminating the noise on side information which is decoder-side prediction of original image using channel code. Generally the side information of Wyner-Ziv coding is generated by using frame interpolation between key frames. The channel code such as Turbo code or LDPC code which shows a performance close to the Shannon's limit is employed. The noise model of Wyner-Ziv coding for channel decoding is called Virtual Channel Noise and is generally modeled by Laplacian or Gaussian distribution. In this paper, we propose a Wyner-Ziv coding method based on the frequency-adaptive channel noise modeling in transform domain. The experimental results with various sequences prove that the proposed method makes the channel noise model more accurate compared to the conventional scheme, resulting in improvement of the rate-distortion performance by up to 0.52dB.

A 3D Magnetic Inversion Software Based on Algebraic Reconstruction Technique and Assemblage of the 2D Forward Modeling and Inversion (대수적 재구성법과 2차원 수치모델링 및 역산 집합에 기반한 3차원 자력역산 소프트웨어)

  • Ko, Kwang-Beom;Jung, Sang-Won;Han, Kyeong-Soo
    • Geophysics and Geophysical Exploration
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    • v.16 no.1
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    • pp.27-35
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    • 2013
  • In this study, we developed the trial product on 3D magnetic inversion tentatively named 'KMag3D'. Also, we briefly introduced its own function and graphic user interface on which especially focused through the development in the form of user manual. KMag3D is consisted of two fundamental frame for the 3D magnetic inversion. First, algebraic reconstruction technique was selected as a 3D inversion algorithm instead of least square method conventionally used in various magnetic inversion. By comparison, it was turned out that algebraic reconstruction algorithm was more effective and economic than that of least squares in aspect of both computation time and memory. Second, for the effective determination of the 3D initial and a-priori information model required in the execution of our algorithm, we proposed the practical technique based on the assemblage of 2D forward modeling and inversion results for individual user-selected 2D profiles. And in succession, initial and a-priori information model were constructed by appropriate interpolation along the strke direction. From this, we concluded that our technique is both suitable and very practical for the application of 3D magentic inversion problem.

An Efficient Dead Pixel Detection Algorithm Implementation for CMOS Image Sensor (CMOS 이미지 센서에서의 효율적인 불량화소 검출을 위한 알고리듬 및 하드웨어 설계)

  • An, Jee-Hoon;Shin, Seung-Gi;Lee, Won-Jae;Kim, Jae-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.4
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    • pp.55-62
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    • 2007
  • This paper proposes a defective pixel detection algorithm and its hardware structure for CCD/CMOS image sensor. In previous algorithms, the characteristics of image have not been considered. Also, some algorithms need quite a time to detect defective pixels. In order to make up for those disadvantages, the proposed defective pixel detection method detects defective pixels efficiently by considering the edges in the image and verifies them using several frames while checking scene-changes. Whenever scene-change is occurred, potentially defective pixels are checked and confirmed whether it is defective or not. Test results showed that the correct detection rate in a frame was increased 6% and the defective pixel verification time was decreased 60%. The proposed algorithm was implemented with verilog HDL. The edge indicator in color interpolation block was reused. Total logic gate count was 5.4k using 0.25um CMOS standard cell library.