• Title/Summary/Keyword: flip-through

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State Assignment Method for Control Part Implementation of Effective-Area (효율적인 면적의 제어부 실현을 위한 상태 할당 방법)

  • Park, S.K.;Choi, S.J.;Cho, J.W.;Jong, C.W.;Lim, I.C.
    • Proceedings of the KIEE Conference
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    • 1987.07b
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    • pp.1556-1559
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    • 1987
  • In this paper, a new state assignment method is proposed for the implementation of the area-effective control part. Introducing the, concept of adjacency matrix to control table generated by SDL(Symbolic Description Language) hardware compiler, a state assignment method is proposed with which minimal number of flip flops and effective number of product terms can be obtained to accomplish the area-effective implementation. Also, with substituting the assigned code to state transition table, boolean equations are obtained through 2-level logic minimization. Proposed algorithm is programmed in C-language on VAX-750/UNIX and b efficiency is shown by the practical example.

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A New Field Programmable Gate Array: Architecture and Implementation

  • Cho, Han-Jin;Bae, Young-Hwan;Eum, Nak-Woong;Park, In-Hag
    • ETRI Journal
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    • v.17 no.2
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    • pp.21-30
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    • 1995
  • A new architecture of field programmable gate array for high-speed datapath applications is presented. Its implementation is facilitated by a configurable interconnect technology based on a one-time, two-terminal programmable, very low-impedance anti-fuse and by a configurable logic module optimized for datapath applications. The configurable logic module can effectively implement diverse logic functions including sequential elements such as latches and flip-flops, and arithmetic functions such as one-bit full adder and two-bit comparator. A novel programming architecture is designed for supplying large current through the anti-fuse element, which drops the on-resistance of anti-fuse below $20{\Omega}$. The chip has been fabricated using a $0.8-{\mu}m$ n-well complementary metal oxide semiconductor technology with two layers of metalization.

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Novel Bumping Process for Solder on Pad Technology

  • Choi, Kwang-Seong;Bae, Ho-Eun;Bae, Hyun-Cheol;Eom, Yong-Sung
    • ETRI Journal
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    • v.35 no.2
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    • pp.340-343
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    • 2013
  • A novel bumping process using solder bump maker is developed for the maskless low-volume solder on pad (SoP) technology of fine-pitch flip chip bonding. The process includes two main steps: one is the aggregation of powdered solder on the metal pads on a substrate via an increase in temperature, and the other is the reflow of the deposited powder to form a low-volume SoP. Since the surface tension that exists when the solder is below its melting point is the major driving force of the solder deposit, only a small quantity of powdered solder adjacent to the pads can join the aggregation process to obtain a uniform, low-volume SoP array on the substrate, regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of $130{\mu}m$ is successfully formed.

Development of the RF SAW filters based on PCB substrate (PCB 기판을 적용한 RF SAW 필터 개발)

  • Lee, Young-Jin;Im, Jong-In;Lee, Seung-Hee
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.597-598
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    • 2006
  • This paper describes a development of a new $1.4{\times}1.1$ and $2.0{\times}1.4mm$ RF SAW filters made by PCB substrate instead of HTCC package, and this technology can reduce the cost of materials down to 40%. We have investigated the multi-layered PCB substrate structures and raw materials to find out the optimal flip-bonding condition between the $LiTaO_3$ wafer and PCB substrates. Also the optimal materials and processing conditions of epoxy laminating film were found out through the experiments which can reduce the bending moment caused by the difference of the thermal expansion between the PCB substrate and laminating film. The new PCB SAW filter shows good electrical and reliability performances with respect to the present SAW filters.

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Changes in University Education based on AI using Flipped Learning (AI 활용한 플립러닝 기반의 대학교육의 변화)

  • Kim, Ok-boon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.10a
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    • pp.612-615
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    • 2018
  • The undergraduate structure based on flip learning should be a necessary course to cultivate value creation capability based on students' problem solving capability through the change of university education in the fourth industrial revolution era. Introduction and spread of Flipping Learning combining project-based learning with MOOC is requied. As the introduction and spread of AI-based learning consulting (E-Advisor), which is becoming increasingly advanced, the transition to "personalized education" that meets the 4th Industrial Revolution should be made.

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Analysis of Relationship between Body and Gimbal Motion Through Experiment of a Single-wheel Robot Based on an Inverse Gyroscopic Effect (외바퀴 로봇의 역자이로 효과에 의한 바디 모션과 김벌 모션의 실험을 통한 관계 분석)

  • Lee, Sang-Deok;Jung, Seul
    • Journal of Institute of Control, Robotics and Systems
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    • v.21 no.11
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    • pp.1064-1069
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    • 2015
  • Control Moment Gyro (CMG) has been used as an indirect actuator of a single-wheel robot system GYROBO, developed at Chungnam National University. The flip motion of the gimbal system produces the gyroscopic motion onto the body system while the body motion also produces the gyroscopic motion onto the gimbal system inversely. In this paper, the intuitive equation of the inverse gyroscopic effect is derived as the direct relation between the rate of the body system and the rate of the gimbal system. Experiments on the inverse gyroscopic effect under the chaotically generated disturbance are conducted. Experimental data are approximated by a linear equation using the least square method.

Low area field-programmable gate array implementation of PRESENT image encryption with key rotation and substitution

  • Parikibandla, Srikanth;Alluri, Sreenivas
    • ETRI Journal
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    • v.43 no.6
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    • pp.1113-1129
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    • 2021
  • Lightweight ciphers are increasingly employed in cryptography because of the high demand for secure data transmission in wireless sensor network, embedded devices, and Internet of Things. The PRESENT algorithm as an ultralightweight block cipher provides better solution for secure hardware cryptography with low power consumption and minimum resource. This study generates the key using key rotation and substitution method, which contains key rotation, key switching, and binary-coded decimal-based key generation used in image encryption. The key rotation and substitution-based PRESENT architecture is proposed to increase security level for data stream and randomness in cipher through providing high resistance to attacks. Lookup table is used to design the key scheduling module, thus reducing the area of architecture. Field-programmable gate array (FPGA) performances are evaluated for the proposed and conventional methods. In Virtex 6 device, the proposed key rotation and substitution PRESENT architecture occupied 72 lookup tables, 65 flip flops, and 35 slices which are comparably less to the existing architecture.

Recent Advances in Radiation-Hardened Sensor Readout Integrated Circuits

  • Um, Minseong;Ro, Duckhoon;Kang, Myounggon;Chang, Ik Joon;Lee, Hyung-Min
    • Journal of Semiconductor Engineering
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    • v.1 no.3
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    • pp.81-87
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    • 2020
  • An instrumentation amplifier (IA) and an analog-to-digital converter (ADC) are essential circuit blocks for accurate and robust sensor readout systems. This paper introduces recent advances in radiation-hardening by design (RHBD) techniques applied for the sensor readout integrated circuits (IC), e.g., the three-op-amp IA and the successive-approximation register (SAR) ADC, operating against total ionizing dose (TID) and singe event effect (SEE) in harsh radiation environments. The radiation-hardened IA utilized TID monitoring and adaptive reference control to compensate for transistor parameter variations due to radiation effects. The radiation-hardened SAR ADC adopts delay-based double-feedback flip-flops to prevent soft errors which flips the data bits. Radiation-hardened IA and ADC were verified through compact model simulation, and fabricated CMOS chips were measured in radiation facilities to confirm their radiation tolerance.

Penetrating behavior of target prawns (Sicyonia penicillata) contacting netting panels in an experimental water tunnel

  • KIM, Yonghae;GORDON, Malcolm S.
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.54 no.3
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    • pp.193-203
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    • 2018
  • Capture efficiencies of commercial shrimp trawls may improve if their designs took into better account behavioral responses of wild shrimp to approaching cod-end of the trawls. Here we report results of water tunnel-based experimental studies of responses of wild California target prawns to several different near-realistic netting configurations over a range of water velocities (0.3-0.7 m/s). Netting panels were oriented at parallel to water flows (FP) on the bottom of test section, vertical (VT) or diagonal sloping backward (DG), bottom to top. Behavioral responses were recorded by video camera and analyzed frame by frame. Measured responses included rates of penetrating through netting by behavioral features and tail-flip frequencies. Frequencies of prawn passing through the nets increased with flow speed for both orientations and were higher at given speeds for sloped nets. Other behavioral features (e.g., passage head-or tail-first) also varied significantly with water velocities and netting orientation. Interactions of penetrating rates between netting orientations and flow speeds also were significantly dependent, except for prawn size. Additional studies are needed of other shrimp species and at higher water velocities more similar to actual field operations using trawls to improve size selectivity.

Fine-Pitch Solder on Pad Process for Microbump Interconnection

  • Bae, Hyun-Cheol;Lee, Haksun;Choi, Kwang-Seong;Eom, Yong-Sung
    • ETRI Journal
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    • v.35 no.6
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    • pp.1152-1155
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    • 2013
  • A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.