• Current Optics and Photonics
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• v.1 no.2
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• pp.143-149
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• 2017

LED arrays with pixel numbers of $3{\times}3$, $4{\times}4$, and $5{\times}5$ have been studied in this paper in order to enhance the optical output power and decrease heat dissipation of an AlGaInP-based light emitting diode display device (pixel size of $280{\times}280{\mu}m$) fabricated by micro-opto-electro-mechanical systems. Simulation results showed that the thermal resistances of the $3{\times}3$, $4{\times}4$, $5{\times}5$ arrays were $52^{\circ}C/W$, $69.7^{\circ}C/W$, and $84.3^{\circ}C/W$. The junction temperature was calculated by the peak wavelength shift method, which showed that the maximum value appears at the center pixel due to thermal crosstalk from neighboring pixels. The central temperature would be minimized with $40{\mu}m$ pixel pitch and $150{\mu}m$ substrate thickness as calculated by thermal modeling using finite element analysis. The modeling can be used to optimize parameters of highly integrated AlGaInP-based LED arrays fabricated by micro-opto-electro-mechanical systems technology.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.583-584
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• 2006

Printing technology has begun to get into the spotlight in many ways due to the low cost effectiveness to existent semi-conductor process. It also has very useful application areas, not only paper printing but also patterning for LCD color tilter, Photovoltaic patterning, RFID antenna, OLED, and so on. In this study, an apparatus of gravure offset printing was developed for fine line width printing. The pattern was composed of $20{\mu}m$ size of continuous lines of which pitch size was $40{\mu}m$. The printed pattern shows that it is possible to make around $20{\mu}m$ line-width printing pattern. The roll-to-roll printing system for fine line-width printing based on primary experiment is presented. For testing of multi-layer printing, the system was designed to be capable of printing two different materials from each printing unit using gravure-offset printing method and have a function of alignment of two printed materials.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.4
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• pp.1210-1215
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• 2010

The probe card are test modules which are to classify the good semiconductor chips and thin film before the packaging process. In the rapid growth a technology of semiconductor, the number of pads per unit area is increasing and pad arrays are becoming irregular. Therefore, the technology of probe card needs narrow width and lots of probe tip. In this paper, the probe tip based on the MEMS(Micro Electro Mechanical System)technology was developed a new MEMS probe tip for vertical probe card applications. For the structural designs of probe tip were performed to mechanical characteristics and structural analysis using FEM(Finite Element Method). Also, the contact force of MEMS probe tip compared with FEM results and experimental results. Finally, the MEMS probe card was developed a fine pitch smaller than $50{\mu}m$.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.3
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• pp.1-6
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• 2016

The Internet of Things (IoT) is a new technology paradigm demanding one packaged system of various semiconductor and MEMS devices. Therefore, the development of electronic packaging technology with very high connectivity is essential for successful IoT applications. This paper discusses both fan-out wafer level packaging (FOWLP) and 3D stacking technologies to achieve the integrattion of heterogeneous devices for IoT. FOWLP has great advantages of high I/O density, high integration, and design flexibility, but ultra-fine pitch redistribution layer (RDL) and molding processes still remain as main challenges to resolve. 3D stacking is an emerging technology solving conventional packaging limits such as size, performance, cost, and scalability. Among various 3D stacking sequences wafer level via after bonding method will provide the highest connectivity with low cost. In addition substrates with ultra-thin thickness, ultra-fine pitch line/space, and low cost are required to improve system performance. The key substrate technologies are embedded trace, passive, and active substrates or ultra-thin coreless substrates.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.2
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• pp.313-318
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• 2012

This paper presents an automatic system to detect variety of faults from fine pitch COF(chip-on-film) which is less than $30{\mu}m$. Developed system contains circuits and technique to detect fast various faults such as hard open, hard short, soft open and soft short from fine pattern. Basic principle for fault detection is to monitor fine differential voltage from pattern resistance differences between fault-free and faulty cases. The technique uses also radio frequency resonator arrays for easy detection to amplify fine differential voltage. We anticipate that proposed system is to be an alternative for conventional COF test systems since it can fast and accurately detect variety of faults from fine pattern COF test process.

• Journal of the Korean Ceramic Society
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• v.43 no.7 s.290
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• pp.439-444
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• 2006

Artificial graphite generally manufactured by carbonization sintering of shape-body of kneaded mixture using granular cokes as filler and pitch as binder, going through pitch impregnation process if necessary and finally applying graphitization heat treatment. Graphite materials are used for core internal structural components of the High-Temperature Gas-cooled Reactors (HTGR) because of their excellent heat resistibility and resistance of crack progress. The HTGR has a core consisting of an array of stacked graphite fuel blocks are machined from IG-110, a high-strength, fine-grained isotropic graphite. In this study, crack stabilization and micro-structures were measured by bend strength and fracture toughness of isotropic graphite grade IG-110. It is important to the reactor designer as they may govern the life of the graphite components and hence the life of the reactor. It was resulted crack propagation, bend strength, compressive strength and micro-structures of IG-110 graphite by scanning electron microscope and universal test machine.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1704-1705
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• 2011

MEMS(Micro Electro Mechanical Systems) 기술과 니켈 전기도금공정을 이용하여 수십 내지 수백개의 탐침을 갖는 일체형 탐침 패드(Probe Pad)를 제작하였다. PI(Polyimide) Film은 일본 UBE사의 $50{\mu}m$ 두께를 갖는 유피렉스를 사용하였다. 일체형 탐침 패드는 Polyimide Film에 Cu를 증착 후 사진식각공정을 통하여 PR Mold 형성한 후 전류가 흐르는 Cu 라인(line) 배선을 형성하기 위해 Cu를 식각하였으며 형성된 Cu Line 위에 니켈 전해도금공정을 실시하여 니켈 배선을 형성하였다. Ni 배선 위에 니켈 범프를 형성하기 위하여 PR Strip을 실시한 후 다시 PR Mold를 형성하였다. PR Mold 형성 후 다시 니켈 전해도 금을 실시하여 니켈 범프(bump)를 형성하였다. 제작된 탐침패드의 니켈배선의 폭은 $18.0{\mu}m$이고 피치(Pitch)는 $35{\mu}m$이며, 니켈 범프의 두께(Thickness)는 $10.0{\mu}m$로 제작되었다. 본 연구에서 제작된 탐침패드를 더욱 더 고집적화(Fine Pitch)하여 일체형 탐침 패드를 제작하게 되면 이를 사용하는 프로브유니트의 제작에 있어서 비용 절감 및 생산성(Throughput)을 크게 향상 시킬 수 있을 것이다.

• Fibers and Polymers
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• v.7 no.1
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• pp.85-87
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• 2006

The tensile-recoil compressional behavior of the carbon nanotube reinforced mesophase pitch (MP)-based composite carbon fibers (CNT-re-MP CFs) was investigated by using Instron and SEM. The CNT-re-MP CFs exhibited improved, or at least equivalent, compressive strength as compared with commercial MP-based carbon fibers. Particularly, when CNT of 0.1 wt% was reinforced, the ratios of recoil compressive strengths to tensile strength of CNT-re-MPCFs were much higher (the difference is at least 10 % or higher) than those for the commercial counterparts and even than those for PAN-based commercial carbon fibers. FESEM micrographs showed somewhat different fractography from that of a typical shear failure as the CNT content increased.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.103-105
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• 2003

COG (Chip on Glass) technology using solder bump reflow has been investigated to attach IC chip directly on glass substrate of LCD panel. As It chip and LCD panel have to be heated to reflow temperature of the so]der bumps for COG bonding, it is necessary to use low-temperature solders to prevent the damage of liquid crystals of LCD panel. In this study, using the Sn-52In solder bumps of $40{\mu}m$ pitch size, solder joints between Si chip and glass substrate were made at temperature below $150^{\circ}C$. The contact resistance of the solder joint was $8.58m\Omega$, which was much lower than that of the joint made using the conventional ACF bonding technique. The Sn-52In solder joints with underfill showed excellent reliability at a hot humid environment.

• Journal of Welding and Joining
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• v.29 no.5
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• pp.95-98
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• 2011

Recently, there is a growing tendency that fine-pitch electronic devices are increased due to higher density and very large scale integration. Finer pitch printed circuit board(PCB) is to be decrease insulation resistance between circuit patterns and electrical components, which will induce to electrical short in electronic circuit by electrochemical migration when it exposes to long term in high temperature and high humidity. In this research, the effect of soldering flux acting as an electrical carrier between conductors on electrochemical migration was investigated. The PCB pad was coated with OSP finish. Sn3.0Ag0.5Cu solder paste was printed on the PCB circuit and then the coupon was treated by reflow process. Thereby, specimen for ion migration test was fabricated. Electrochemical migration test was conducted under the condition of DC 48 V, $85^{\circ}C$, and 85 % relative humidity. Their life time could be increased about 22% by means of removal of flux. The fundamentals and mechanism of electrochemical migration was discussed depending on the existence of flux residues after reflow process.