• Title/Summary/Keyword: feature from accelerated segment test

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Feature Matching Algorithm Robust To Noise (잡음에 강인한 특징점 정합 기법)

  • Jung, Hyunjo;Yoo, Jisang
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2015.07a
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    • pp.9-12
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    • 2015
  • In this paper, we propose a new feature matching algorithm by modifying and combining the FAST(Features from Accelerated Segment Test) feature detector and SURF feature descriptor which is robust to the distortion of the given image. Scale space is generated to consider the variation of the scale and determine the candidate of features in the image robust to the noise. The original FAST algorithm results in many feature points along edges. To solve this problem, we apply the principal curvatures for refining it. We also use SURF descriptor to make it robust against the variations in the image by rotation. Through the experiments, it is shown that the proposed algorithm has better performance than the conventional feature matching algorithms even though it has much less computational load. Especially, it shows a strength for noisy images.

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An Embedded FAST Hardware Accelerator for Image Feature Detection (영상 특징 추출을 위한 내장형 FAST 하드웨어 가속기)

  • Kim, Taek-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.49 no.2
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    • pp.28-34
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    • 2012
  • Various feature extraction algorithms are widely applied to real-time image processing applications for extracting significant features from images. Feature extraction algorithms are mostly combined with image processing algorithms mostly for image tracking and recognition. Feature extraction function is used to supply feature information to the other image processing algorithms and it is mainly implemented in a preprocessing stage. Nowadays, image processing applications are faced with embedded system implementation for a real-time processing. In order to satisfy this requirement, it is necessary to reduce execution time so as to improve the performance. Reducing the time for executing a feature extraction function dose not only extend the execution time for the other image processing algorithms, but it also helps satisfy a real-time requirement. This paper explains FAST (Feature from Accelerated Segment Test algorithm) of E. Rosten and presents FPGA-based embedded hardware accelerator architecture. The proposed acceleration scheme can be implemented by using approximately 2,217 Flip Flops, 5,034 LUTs, 2,833 Slices, and 18 Block RAMs in the Xilinx Vertex IV FPGA. In the Modelsim - based simulation result, the proposed hardware accelerator takes 3.06 ms to extract 954 features from a image with $640{\times}480$ pixels and this result shows the cost effectiveness of the propose scheme.

Feature Matching Algorithm Robust To Viewpoint Change (시점 변화에 강인한 특징점 정합 기법)

  • Jung, Hyun-jo;Yoo, Ji-sang
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.12
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    • pp.2363-2371
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    • 2015
  • In this paper, we propose a new feature matching algorithm which is robust to the viewpoint change by using the FAST(Features from Accelerated Segment Test) feature detector and the SIFT(Scale Invariant Feature Transform) feature descriptor. The original FAST algorithm unnecessarily results in many feature points along the edges in the image. To solve this problem, we apply the principal curvatures for refining it. We use the SIFT descriptor to describe the extracted feature points and calculate the homography matrix through the RANSAC(RANdom SAmple Consensus) with the matching pairs obtained from the two different viewpoint images. To make feature matching robust to the viewpoint change, we classify the matching pairs by calculating the Euclidean distance between the transformed coordinates by the homography transformation with feature points in the reference image and the coordinates of the feature points in the different viewpoint image. Through the experimental results, it is shown that the proposed algorithm has better performance than the conventional feature matching algorithms even though it has much less computational load.

Comparative Analysis of Detection Algorithms for Corner and Blob Features in Image Processing

  • Xiong, Xing;Choi, Byung-Jae
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.13 no.4
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    • pp.284-290
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    • 2013
  • Feature detection is very important to image processing area. In this paper we compare and analyze some characteristics of image processing algorithms for corner and blob feature detection. We also analyze the simulation results through image matching process. We show that how these algorithms work and how fast they execute. The simulation results are shown for helping us to select an algorithm or several algorithms extracting corner and blob feature.

Fast Stitching Algorithm by using Feature Tracking (특징점 추적을 통한 다수 영상의 고속 스티칭 기법)

  • Park, Siyoung;Kim, Jongho;Yoo, Jisang
    • Journal of Broadcast Engineering
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    • v.20 no.5
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    • pp.728-737
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    • 2015
  • Stitching algorithm obtain a descriptor of the feature points extracted from multiple images, and create a single image through the matching process between the each of the feature points. In this paper, a feature extraction and matching techniques for the creation of a high-speed panorama using video input is proposed. Features from Accelerated Segment Test(FAST) is used for the feature extraction at high speed. A new feature point matching process, different from the conventional method is proposed. In the matching process, by tracking region containing the feature point through the Mean shift vector required for matching is obtained. Obtained vector is used to match the extracted feature points. In order to remove the outlier, the RANdom Sample Consensus(RANSAC) method is used. By obtaining a homography transformation matrix of the two input images, a single panoramic image is generated. Through experimental results, we show that the proposed algorithm improve of speed panoramic image generation compared to than the existing method.

Performance Improvement for Robust Eye Detection Algorithm under Environmental Changes (환경변화에 강인한 눈 검출 알고리즘 성능향상 연구)

  • Ha, Jin-gwan;Moon, Hyeon-joon
    • Journal of Digital Convergence
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    • v.14 no.10
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    • pp.271-276
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    • 2016
  • In this paper, we propose robust face and eye detection algorithm under changing environmental condition such as lighting and pose variations. Generally, the eye detection process is performed followed by face detection and variations in pose and lighting affects the detection performance. Therefore, we have explored face detection based on Modified Census Transform algorithm. The eye has dominant features in face area and is sensitive to lighting condition and eye glasses, etc. To address these issues, we propose a robust eye detection method based on Gabor transformation and Features from Accelerated Segment Test algorithms. Proposed algorithm presents 27.4ms in detection speed with 98.4% correct detection rate, and 36.3ms face detection speed with 96.4% correct detection rate for eye detection performance.

A panorama image generation method using FAST algorithm (FAST를 이용한 파노라마 영상 생성 방법)

  • Kim, Jong-ho;Ko, Jin-woong;Yoo, Jisang
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.3
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    • pp.630-638
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    • 2016
  • In this paper, a feature based panorama image generation algorithm using FAST(Features from Accelerated Segment Test) method that is faster than SIFT(Scale Invariant Feature Transform) and SURF(Speeded Up Robust Features) is proposed. Cylindrical projection is performed to generate natural panorama images with numerous images as input. The occurred error can be minimized by applying RANSAC(Random Sample Consensus) for the matching process. When we synthesize numerous images acquired from different camera angles, we use blending techniques to compensate the distortions by the heterogeneity of border line. In that way, we could get more natural synthesized panorama image. The proposed algorithm can generate natural panorama images regardless the order of input images and tilted images. In addition, the image matching can be faster than the conventional method. As a result of the experiments, distortion was corrected and natural panorama image was generated.

Comparative Study of Corner and Feature Extractors for Real-Time Object Recognition in Image Processing

  • Mohapatra, Arpita;Sarangi, Sunita;Patnaik, Srikanta;Sabut, Sukant
    • Journal of information and communication convergence engineering
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    • v.12 no.4
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    • pp.263-270
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    • 2014
  • Corner detection and feature extraction are essential aspects of computer vision problems such as object recognition and tracking. Feature detectors such as Scale Invariant Feature Transform (SIFT) yields high quality features but computationally intensive for use in real-time applications. The Features from Accelerated Segment Test (FAST) detector provides faster feature computation by extracting only corner information in recognising an object. In this paper we have analyzed the efficient object detection algorithms with respect to efficiency, quality and robustness by comparing characteristics of image detectors for corner detector and feature extractors. The simulated result shows that compared to conventional SIFT algorithm, the object recognition system based on the FAST corner detector yields increased speed and low performance degradation. The average time to find keypoints in SIFT method is about 0.116 seconds for extracting 2169 keypoints. Similarly the average time to find corner points was 0.651 seconds for detecting 1714 keypoints in FAST methods at threshold 30. Thus the FAST method detects corner points faster with better quality images for object recognition.

Thermal Image Mosaicking Using Optimized FAST Algorithm

  • Nguyen, Truong Linh;Han, Dong Yeob
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.35 no.1
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    • pp.41-53
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    • 2017
  • A thermal camera is used to obtain thermal information of a certain area. However, it is difficult to depict all the information of an area in an individual thermal image. To form a high-resolution panoramic thermal image, we propose an optimized FAST (feature from accelerated segment test) algorithm to combine two or more images of the same scene. The FAST is an accurate and fast algorithm that yields good positional accuracy and high point reliability; however, the major limitation of a FAST detector is that multiple features are detected adjacent to one another and the interest points cannot be obtained under no significant difference in thermal images. Our proposed algorithm not only detects the features in thermal images easily, but also takes advantage of the speed of the FAST algorithm. Quantitative evaluation shows that our proposed technique is time-efficient and accurate. Finally, we create a mosaic of the video to analyze a comprehensive view of the scene.

A Threshold Controller for FAST Hardware Accelerator (FAST 하드웨어 가속기를 위한 임계값 제어기)

  • Kim, Taek-Kyu;Suh, Yong-Suk
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.11
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    • pp.187-192
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    • 2014
  • Various researches are performed to extract significant features from continuous images. The FAST algorithm has the simple structure for arithmetic operation and it is easy to extraction the features in real time. For this reason, the FPGA based hardware accelerator is implemented and widely applied for the FAST algorithm. The hardware accelerator needs the threshold to extract the features from images. The threshold is influenced not only the number of extracted features but also the total execution time. Therefore, the way of threshold control is important to stabilize the total execution time and to extract features as much as possible. In order to control the threshold, this paper proposes the PI controller. The function and performance for the proposed PI controller are verified by using test images and the PI control logic is designed based on Xilinx Vertex IV FPGA. The proposed scheme can be implemented by adding 47 Flip Flops, 146 LUTs, and 91 Slices to the FAST hardware accelerator. This proposed approach only occupies 2.1% of Flip Flop, 4.4% of LUTs, and 4.5% of Slices and can be regarded as a small portion of hardware cost.