• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.10
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• pp.12-19
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• 1996

Many recent supercomputers employ a kind of switch-based multistage interconnection network architectrues (MINs) for constructing scalabel parallel compters. This paper proposed a new routing method, hybrid wormhole and virtual-cut through routing (HWCR) for the prevention of rapid performance degradation comming from a conflict in links usage at hot traffic situation. This HWCR through (VCT) for the fast removing temporal stagger, result in seamless flow of packet stream. When the blocked link is removed, wormhole routing is resumed. The HWCR method adopted a hierachical buffer scheme for improving the network performance and reducing the cost in BMINs. We could get optimum buffer size and communicatin latency through the computer simulation based on proposed HWCR, and the results were compared to those using wormhole and VCT.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.1
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• pp.67-73
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• 1996

Subsynchronous resonance(SSR) causes a torsional shaft torque on the generator. Damages resulting from the uncontrolled SSR have resulted in the breakdown in the shaft and costs for replacement power. This paper is to determine the feasibility of controlling SSR by the fast modulation of series compensation capacitors. The presence of subsynchronous currents in the system was detected by a subsynchronous relay which was modeled by the transient analysis of control systems(TACS) in electromagnetic transients program (EMTP). The capacitor segments were switched by bi-directional thyristor switches. These were modeled into EMTP. The strategy to switch the capacitors were modeled as a closed loop system. The paper proves that effective control of SSR can be obtained only by the detuning of the system and the removal or blocking of subsynchronous energy from the system. (author). refs., figs., tabs.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.22-25
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• 2007

The paper describes a power factor correction high efficiency PWM single-phase rectifier. Its good characteristics such as simple circuit structure, simple PWM control, low switch stress, and low VAR rating of commutation circuits make the proposed rectifier very suitable for various unidirectional power applications. In particular, the design guide line is suggested to make the circuit design of the proposed rectifier easy and fast.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2143-2145
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• 2005

Power semicondcutor인 IGBT MOSFET, GTO, SI-Thyristor등은 높은 스위치 신뢰성과 life time, 그리고 fast repetition rate 등을 지니고 있기 때문에 medium/High voltage영역에서 스위치 사용이 대두되어 왔으나, Thyratron이나 Trigatron(Gap switch)와 비교하여 낮은 전압/전류를 스위칭하기 때문에 전통적으로 직렬연결을 통해 high voltage 영역의 스위치로 사용되어 왔다. 하지만, 직렬연결되어 있는 각각의 power semiconductor와 gate driving circuit의 on/off synchronization이 맞지 않기 때문에 부하의 급격한 변화에 따른 전압의 balance에 문제가 가장 심각하게 대두되어 왔다. 이러한 문제를 해결하기 위해서 gate driving circuit에서 제어를 해주는 방법과 power semiconductor에서 제어를 해주는 방법이 있으나 두 방식 모두 문제점이 있다. 본 논문에서는 기존의 zener clamping방식에서 벗어나 새로운 active clamping방식의 직렬연결을 제안했으며 시뮬레이션과 실험을 통해 나타난 이 결과들은 on/off transient 시 symmetry를 유지하는데 효과적이라는 것을 보여주고 있다.

• Proceedings of the KIEE Conference
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• 2000.11b
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• pp.348-351
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• 2000

There have been significant advances in thyratron performance in recent years. these advanced waveforms have increased the complexity and cost of drive circuits. Thyratrons can reliably switch anode voltages up to 40kV and conduct peak currents up to 10kA or more. So stable thyratron drivers are essential for reliable high voltage pulse modulators. In order to operate thyratron well, thyratron driver need high repetition rate, fast rising time and low jitter. In this paper, used power MOSFET/transformer combinations. Designed thyratron driver is satisfied requirements and experimental results are presented to confirm.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.189-192
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• 2001

A new phase-shifted parallel-input/series-output dual converter for high-power step-up applications has been proposed. It features a high efficiency due to the low switch turn-off voltage, low device stresses, low ripple contents, and a fast control-to-output dynamics compared to its PWM counterpart. To confirm the validity of the proposed converter, experimental results from an 800W, 350Vdc prototype are presented.

• Journal of Power Electronics
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• v.10 no.4
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• pp.388-395
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• 2010

An active boost converter for a single phase SRM using series-parallel connected capacitors is proposed in this paper. The proposed active boost converter has two diodes and one power switch with an anti-parallel diode and one additional boost capacitor. The additional boost capacitor could be series or parallel connected to the dc-link capacitor to produce proper excitation and demagnetization voltage. The proposed active boost converter can easily achieve a fast excitation and demagnetization from the capacitor connection. In this paper, series and parallel connected converters are reviewed, and the detailed operating modes as well as the voltage characteristics of the proposed converter are analyzed. The simulation and experimental results shows the effectiveness of the proposed active boost converter.

• Transactions on Electrical and Electronic Materials
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• v.18 no.4
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• pp.195-198
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• 2017

This research analyzed the electrical characteristics of an 80 V optimal trench power MOSFET (metal oxide field effect transistor) for mobile applications. The power MOSFET is a fast switching device in fields with low voltage(<100 V) such as mobile application. Moreover, the power MOSFET is a major carrier device that is not minor carrier accumulation when the device is turned off. We performed process and device simulation using TCAD tools such as MEDICI and TSUPREM. The electrical characteristics of the proposed trench gate power MOSFET such as breakdown voltage and on resistance were compared with those of the conventional power MOSFET. Consequently, we obtained breakdown voltage of 100 V and low on resistance of $130m{\Omega}$. The proposed power MOSFET will be used as a switch in batteries of mobile phones and note books.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.679-680
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• 2009

Radio jamming attack is the most effective and easiest Denial-of-Service (DOS) attack in wireless network. In this paper, we proposed a multi-channel MAC protocol to mitigate the jamming attacks by using cognitive radio. The Cognitive Radio (CR) technology supports real-time spectrum sensing and fast channel switching. By using CR technologies, the legitimate nodes can perform periodic spectrum sensing to identify jamming free channels and when the jamming attack is detected, it can switch to un-jammed channel with minimum channel switching delay. In our proposed protocol, these two CR technologies are exploited for thwarting the jamming attacks.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.133-142
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• 2004

Recently, the growth of Internet and a variety of multimedia services through Internet increasingly demands high-speed packet transmission, the new routing function, and QoS guarantee on conventional routers. Thus, a new switching mechanical called the MPLS(Multi-Protocol Label Switching), was proposed by IETF(Internet Engineering Task Force) as a solution to meet these demands. In addition the deployment of MPLS network supporting Differentiated Services is required. In this paper, we propose the architecture of the MPLS switch supporting Differentiated Services in the MPLS-based network. The traffic conditioner consists of a classifier, a meter, and a marker. The VOQ-PHB module, which combines input Queue with each PHB queue, is implemented to utilize the resources efficiently. It employs the Priority-iSLIP scheduling algorithm to support high-speed switching. We have designed and verified the new and fast hardware architecture of VOQ-PHB and the traffic conditioner for QoS and high-speed switching using NS-2 simulator. In addition, the proposed architecture is modeled in VHDL, synthesized and verified by the VSS analyzer from SYNOPSYS. Finally, to justify the validity of the hardware architecture, the proposed architecture is placed and routed using Apollo tool.