• Journal of Industrial Technology
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• v.20 no.B
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• pp.155-162
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• 2000

Although Fuzzy Logic Controller(FLC) adopted three terms as input gives better performance, FLC is in general composed of two-term control because of the difficulty in the construction of fuzzy rule base. In this paper, a three-term FLC which is similar to PID control but acts as a nonlinear controller is proposed. To reduce the complexity of the rule base design and to increase efficiency. a simplified fuzzy PID control is induced from a hybrid velocity/position type PID algorithm by sharing a common rule base for both fuzzy PI and fuzzy PD parts. It is simple in structure, easy in implementation, and fast in calculation. The phase plane technique is applied to obtain the rule base for fuzzy two-term control and the resultant rule base is Macvicar-Whelan type. And the membership function is a Gaussian function. The frequency response information is used in tuning of the membership functions. Also a tuning strategy for the scaling factors is proposed based on the relationship between PID gain and the scaling factors. Simulation results show better performance and the effectiveness of the proposed method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.2
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• pp.451-454
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• 2011

In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.811-818
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• 2016

A continuous fine-tuning phase locked loop with an additional negative feedback loop has been proposed. When the phase locked loop is out-of-lock, the phase locked loop has a fast locking characteristic using the continuous band-selection loop. When the phase locked loop is near in-lock, the bandwidth is narrowed with the fine loop. The additional negative feedback loop consists of a voltage controlled oscillator, a frequency voltage converter and its internal loop filter. It serves a negative feedback function to the main phase locked loop, and improves the phase noise characteristics and the stability of the proposed phase locked loop. The additional negative feedback loop makes the continuous fine-tuning loop work stably without any voltage fluctuation in the loop filter. Measurement results of the fabricated phase locked loop in $0.18{\mu}m$ CMOS process show that the phase noise is -109.6dBc/Hz at 2MHz offset from 742.8MHz carrier frequency.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.158.5-158
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• 2001

Monopulse active homing radar requires velocity and angle information of target to track fast moving target. Target velocity can be estimated by measuring the frequency shift between transmitted and received frequencies. Angle information is obtained by measuring boresight error. Measurement of doppler frequency component in received signal is done through FFT analysis and interpolation algorithm for fine tuning. Boresight errors in azimuth and elevation axes are proportional to the power of each difference channel relative to sum channel. The target signal power in difference channel is estimated more precisely by measuring the power of FFT result cell of maximum ...

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.6
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• pp.938-943
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• 2008

Coupling capacitor voltage transformers(CCVTs) have been used in extra or ultra high voltage systems to obtain the standard low voltage signal for protection and measurement. For fast suppression of the phenomenon of ferroresonance, three winding CCVTs are used instead of two winding CCVTs. A tuning reactor is connected between a capacitor voltage divider and a voltage transformer to reduce the phase angle difference between the primary and secondary voltages in the steady state. Slight distortion of the secondary voltage is generated when no fault occurs. However, when a fault occurs, the secondary voltage of the CCVT has significant errors due to the transient components such as dc offset component and/or high frequency components resulting from the fault. This paper proposes an algorithm for compensating the secondary voltage of a three winding CCVT in the time domain. With the values of the measured secondary voltage of the three winding CCVT, the secondary, tertiary and primary currents and voltages are estimated; then the voltages across the capacitor and the tuning reactor are calculated and then added to the measured voltage. Test results indicate that the algorithm can successfully compensate the distorted secondary voltage of the three winding CCVT irrespective of the fault distance, the fault impedance and the fault inception angle as well as in the steady state.

• Proceedings of the KIEE Conference
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• 2000.11d
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• pp.650-652
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• 2000

Although Fuzzy Logic Controller(FLC) adopted three terms as input gives better performance. FLC is in general composed of two-term control because of the difficulty in the construction of fuzzy rule base. In this paper, a three-term FLC which is similar to PID control but acts as a nonlinear controller is proposed. To reduce the complexity of the rule base design and increase efficiency, a simplified fuzzy PID control is induced from a hybrid velocity/position type PID algorithm by sharing a common rule base for both fuzzy Pi and fuzzy PD parts. It is simple in structure, easy in implementation, and fast in calculation. The phase plane technique is applied to obtain the rule base for fuzzy two-term control and them. The resultant rule base is Macvicar-Whelan type. The frequency response information is used in tuning of membership functions. Also a tuning strategy for the scaling factors is Proposed based on the relationship between PID gain and them. Simulation results show better performance and the effectiveness of the proposed method.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2005.05a
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• pp.498-503
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• 2005

This paper is concerned with the implementation of adaptive positive position feedback controller using a digital signal processor and microcontroller The main advantage of the positive position feedback controller is that it can control a natural mode of interest by tuning the filter frequency of the positive position feedback controller to the natural frequency of the target mode. However, the positive position feedback controller loses its advantage when mistuned. In this paper, the fast fourier transform algorithm is implemented on the microcontroller whereas the positive position feedback controller is implemented on the digital signal processor. After calculating the frequency which affects the vibrations of structure most the result is transferred to the digital signal processor. The digital signal processor updates the information on the frequency to be controlled so that it can cope with both internal and external changes. The proposed scheme was installed and tested using a beam equipped with piezoceramic sensor and actuator. The experimental results show that the adaptive positive position feedback controller proposed in this paper can suppress vibrations even when the target structure undergoes structural change thus validating the approach.

• Journal of Institute of Control, Robotics and Systems
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• v.5 no.1
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• pp.95-104
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• 1999

In this paper we propose a fast and precise control algorithm for a mobile robot, which aims at the self-tuning control applying two multi-layered neural networks to the structure of computed torque method. Through this algorithm, the nonlinear terms of external disturbance caused by variable task environments and dynamic model errors are estimated and compensated in real time by a long term neural network which has long learning period to extract the non-linearity globally. A short term neural network which has short teaming period is also used for determining optimal gains of PID compensator in order to come over the high frequency disturbance which is not known a priori, as well as to maintain the stability. To justify the global effectiveness of this algorithm where each of the long term and short term neural networks has its own functions, simulations are peformed. This algorithm can also be utilized to come over the serious shortcoming of neural networks, i.e., inefficiency in real time.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.3
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• pp.131-138
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• 1999

Generally, the digital controller has many advantages such as high precision, robustness to electrical noise, capability of flexible programming and fast response to the load variation. In this study, we have established proper mathematical equivalent model of Brushless DC (BLDC) motor and estimated the motor parameter by means of the back-emf measurement as being the step input to the controlled target BLDC motor. And the validity of proposed estimation method is confirmed by the test result of step response. As well, we have designed the reasonable digital controller as a consequence of the root locus method which is obtained from the open-loop transfer function of BLDC motor with hall sensor, and the determination of control gain for variable speed control. Here, revised Ziegler-Nichols tuning method is applied for the proper digital gain establishment, and the system stability is verified by the frequency domain analysis with Bode-plot and experimentation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.7
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• pp.7-15
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• 2002

The digital DBS tuner is designed and implemented in a CMOS process using a direct-conversion architecture that offers a high degree of integration. To generate mathched LO I/Q quadrature signals covering the total input frequency range, a fully integrated ring oscillator is employed. And, to decrease a high level of phase noise of the ring oscillator, a frequency synthesizer is designed using a double loop strucure. This paper proposes and verifies a band selective loop for fast frequency switching time of the double loop frequency synthesizer. The down-conversion mixer with source follower input stages is used for low voltage operation. An experiment implementation of the frequency synthesizer and mixer with integrated a 0.25um CMOS process achieves a switching time of 600us when frequency changes from 950 to 2150MHz. And, the experiment results show a quadrature amplitude mismatch of max. 0.06dB and a quadrature phase mismathc of max. >$3.4^{\circ}$.