• Journal of IKEEE
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• v.25 no.4
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• pp.697-702
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• 2021

Fast Fourier Transform (FFT) is a major signal processing block being widely used. For long-point FFT processing, usually more than 1024 points, its low-complexity implementation becomes very important while retaining high SQNR (Signal-to-Quantization Noise Ratio). In this paper, we present a low-complexity FFT algorithm with a simple dynamic scaling scheme. For the 2048-point pipelined FFT processing, we can reduce the number of general multipliers by half compared to the well-known radix-2 algorithm. Also, the table size for twiddle factors is reduced to 35% and 53% compared to the radix-2 and radix-2² algorithms respectively, while achieving SQNR of more than 55dB without increasing the internal wordlength progressively.

• Applied Microscopy
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• v.44 no.4
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• pp.138-143
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• 2014

Transmission electron microscope (TEM) is an excellent tool for studying the structure and properties of nanostructured materials. As the development of $C_s$-corrected TEM, the direct analysis of atomic structures of nanostructured materials can be performed in the high-resolution transmission electron microscopy (HRTEM). Especially, fast Fourier transform (FFT) technique in image processing is very useful way to determine the crystal structure of HRTEM images in reciprocal space. To apply FFT technique in HRTEM analysis in more reasonable and friendly manner, we made a new circular region of interest (C-ROI) FFT script and tested it for several HRTEM analysis. Consequentially, it was proved that the new FFT application shows more quantitative and clearer results than conventional FFT script by removing the streaky artifacts in FFT pattern images. Finally, it is expected that the new FFT script gives great advantages for quantitative interpretation of HRTEM images of many nanostructured materials.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.2119.1_2120.1
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• 2009

UWB(Ultra Wide Band)는 차세대 무선통신 기술로 무선 디지털펄스라고도 한다. GHz대의 주파수를 사용하면서도 초당 수천~수백만 회의 저출력 펄스로 이루어진 것이 큰 특징이다[1]. 기존 무선통신 기술의 양대 축인 IEEE 802.11과 블루투스 등에 비해 속도와 전력소모 등에서 월등히 앞서고 있으며, SoC(System on a Chip)의 저전력 구현에 대한 연구가 활발히 진행되고 있다. OFDM은 크게 FFT(Fast Fourier Transform) 블록, Interpolation /decimation 필터 블록, 비터비 블록, 변복조 블록, 등화기 블록 등으로 구성된다. 고속 시스템에서는 대역효율성이 우수한 OFDM(Orthogonal Frequency Division Multiplexing) 방식을 사용하고 있으며, OFDM 전송방식은 직렬로 입력되는 데이터 열을 병렬 데이터 열로 변환한 후에 부반송파에 실어 전송하는 방식이다. 이와 같은 병렬화와 부반송파를 곱하는 동작은 IFFT와 FFT로 구현이 가능한데, FFT 블록의 구현 비용과 전력소모를 줄이는 것이 핵심사항이라고 할 수 있다. 기존논문에서는 OFDM용 FFT 구조로 단일버터플라이연산자 구조, 파이프라인 구조, 병렬구조 등의 여러 구조가 제안되었다[2]. 본 논문에서는 Radix-8 FFT 알고리즘 기반의 New partial Arithmetic 저전력 FFT 구조를 제안하였다. 제안한 New partial Arithmetic 저전력 FFT구조는 곱셈기 대신 병렬 가산기를 이용 하여 지금까지 사용되는 FFT 구조보다 전력소모를 줄일 수 있음을 보였다.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.498-503
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• 2009

As for Hadamard Transform, because the calculation time of this transform is slower than Discrete Cosine Transform (DCT) and Fast Fourier Transform (FFT), the effectiveness and the practicality are insufficient. Then, the computational complexity can be decreased by using the butterfly operation as well as FFT. We composed calculation time of FFT with that of Fast Complex Hadamard Transform by constructing the algorithm of Fast Complex Hadamard Transform. They are indirect conversions using program of complex number calculation, and immediate calculations. We compared calculation time of them with that of FFT. As a result, the reducing the calculation time of the Complex Hadamard Transform is achieved. As for the computational complexity and calculation time, the result that quadrinomial Fast Complex Hadamard Transform that don't use program of complex number calculation decrease more than FFT was obtained.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.11
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• pp.11-18
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• 2007

FFT(Fast Fourier Transform) processor is one of the key components in the implementation of OFDM systems such as WiBro, DAB and UWB systems. Most of the researches on the implementation of FFT processors have focused on reducing the complexities of multipliers, memory and control circuits. In this paper, to reduce the memory size required for IFFT(Inverse Fast Fourier Transform), we propose a new IFFT design method based on a mapping method. By simulations, it is shown that the reposed IFFT design method achieves more than 60% area reduction and much SQNR(Signal-to-Quantization-Noise Ratio) gain compared with previous IFFT circuits.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.343-346
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• 1998

In this paper a radiation problem for a finite microstrip antenna structure is analyzed. For the analysis of finite structures we utilize the equivalent volume current. Intergral equation for the unknown equivalent volume current induced on a finite microstrip structure is derived and solved by the use of conjugate gradient-fast fourier. transform (CG-FFT) method. Some numerical examples are radiation patterns derived by the equivalent volume current solved by the conjugate gradient-fast fourier transform.

• Korean Journal of Mathematics
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• v.19 no.3
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• pp.243-253
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• 2011

We would like to propose a Cooley-Tukey modied algorithm in fast Fourier transform(FFT). Of course, this is a kind of Cooley-Tukey twiddle factor algorithm and we focused on the choice of integers. The proposed algorithm is better than existing ones in speeding up the calculation of the FFT.

• Korean Security Journal
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• no.61
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• pp.377-400
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• 2019

Photography is the most commonly used method of documenting the crime and incident scene as it helps maintaining chain of custody (COC) and prove integrity of the physical evidence. It can also capture phenomena as they are. However, digital images can be manipulated and lose their authenticity as admissible evidence. Thus only limited techniques can be used to enhance images, and one of them is Fourier transform. Fourier transform refers to transformation of images into frequency signals. Fast Fourier transform (FFT) is used in this study. In this experiment, we overlapped fingerprints with graph paper or other fingerprints and separated the fingerprints. Then we evaluated and compared quality of the separated fingerprints to the original fingerprints, and examined whether the two fingerprints can be identified as same fingerprints. In the case of the fingerprints on graph paper and general pattern-overlapping fingerprints, fingerprint ridges are enhanced. On the other hand, in case of separating complicated fingerprints such as core-to-core overlapping and delta-to-delta overlapping fingerprints, quality of fingerprints can be deteriorated. Quality of fingerprints is known to possibly bring negative effects on the credibility of examiners. The result of this study may be applicable to other areas using digital imaging enhancement technology.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.7
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• pp.3438-3454
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• 2018

In this paper, we propose a robust blind watermarking scheme for high-definition video. In the embedding process, luminance component of each frame is transformed by 2-dimensional fast Fourier transform (2D FFT). A secret key is used to generate a matrix of random numbers for the security of watermark information. The matrix is transformed by inverse steerable pyramid transform (SPT). We embed the watermark into the low and mid-frequency of 2D FFT coefficients with the transformed matrix. In the extraction process, the 2D FFT coefficients of each frame and the transformed matrix are transformed by SPT respectively, to produce two oriented sub-bands. We extract the watermark from each frame by cross-correlating two oriented sub-bands. If a video is degraded by some attacks, the watermarks of frames contain some errors. Thus, we use an ensemble position-based error correcting algorithm to estimate the errors and correct them. The experimental results show that the proposed watermarking algorithm is imperceptible and moreover is robust against various attacks. After embedding 64 bits of watermark into each frame, the average peak signal-to-noise ratio between original frames and embedded frames is 45.7 dB.

• Journal of Advanced Navigation Technology
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• v.22 no.5
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• pp.429-435
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• 2018

In radar systems, FFT (fast Fourier transform) operation is necessary to obtain the range and velocity of target, and the design of an FFT processor which operates at high speed is required for real-time implementation. The perfect shuffle network is suitable for high-speed FFT processor. In particular, twice perfect shuffle network based on radix-4 is preferred for very high-speed FFT processor. Moreover, radar systems that requires various velocity resolution should support scalable FFT points. In this paper, we propose a 8~1024-point scalable FFT processor based on twice perfect shuffle network algorithm and present hardware design and implementation results. The proposed FFT processor was designed using hardware description language (HDL) and synthesized to gate-level circuits using $0.65{\mu}m$ CMOS process. It is confirmed that the proposed processor includes logic gates of 3,293K.