• 제목/요약/키워드: error elimination

검색결과 156건 처리시간 0.026초

컴파일러에 의한 C레벨 에러 체크 (Compiler triggered C level error check)

  • 정지문;윤종희;이종원;백윤흥
    • 정보처리학회논문지A
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    • 제18A권3호
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    • pp.109-114
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    • 2011
  • IR(Intermediate Representation) 최적화 과정은 컴파일러 back-end의 중요한 부분으로서 sub-expression elimination, dead code elimination 등 최적화 기법들을 사용한다. 하지만 IR 최적화 단계에서 생기는 에러들을 검출하고 디버깅하는데 많은 어려움이 있다. 그 첫 번째 이유로는 컴파일 된 어셈블리 코드를 해독하여 에러를 체크하기 어렵고 두 번째로는 IR 최적화 단계에서 에러가 생겼는지 결정 짓기 어렵기 때문이다. 이런 이유들로 인하여, 우리는 C 레벨에서 IR 코드변환 무결점 여부를 체크하기 위한 기법들에 관한 연구를 진행하여 왔다. 우리는 MeCC(Memory Comparison-based Clone) 탐색기를 기반으로 하여, 최적화하기 전 IR코드와 최적화 한 후의 IR코드를 각각 C코드로 다시 변환한 뒤, 이 두 개의 C코드를 MeCC의 입력으로 주고, 결과의 일치 여부를 확인하는 방법을 사용한다. 하지만 MeCC가 완벽한 결과를 알려주지 않기 때문에, 우리는 각 IR 최적화 기법마다의 특징에 대한 정보를 사전에 처리해서 그 결과의 정확도를 높였다. 이 논문에서는 dead code elimination, instruction scheduling 및 common sub-expression elimination 등 최적화 기법들을 이용한 변환 코드들을 예시로 실험하여 최종적으로 MeCC에서의 C 레벨 코드의 정확한 에러 체크 동작여부를 보여준다.

1회선 송전선로 단락사고의 개선된 고장점 표정기법 (Enhanced Fault Location Algorithm for Short Faults of Transmission Line)

  • 이경민;박철원
    • 전기학회논문지
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    • 제65권6호
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    • pp.955-961
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    • 2016
  • Fault location estimation is an important element for rapid recovery of power system when fault occur in transmission line. In order to calculate line impedance, most of fault location algorithm uses by measuring relaying waveform using DFT. So if there is a calculation error due to the influence of phasor by DC offset component, due to large vibration by line impedance computation, abnormal and non-operation of fault locator can be issue. It is very important to implement the robust fault location algorithm that is not affected by DC offset component. This paper describes an enhanced fault location algorithm based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any erstwhile information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced fault location algorithm uses DFT filter as well as the proposed DC offset filter. The behavior of the proposed fault location algorithm using off-line simulation has been verified by data about several fault conditions generated by the ATP simulation program.

CNC 밀링머신 이송장치의 오차유형 및 정상상태 오차해석에 의한 제어기 설계 (Controller Design by Error Shape and Steady-State Error Analysis for a Feed Drive System in CNC Milling Machine)

  • 이건복;길형균
    • 한국정밀공학회지
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    • 제22권3호
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    • pp.52-60
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    • 2005
  • This paper deals with the position control fur a feed drive system in CNC milling machine, which utilizes a modified error signal for the elimination of steady-state error. A linear time-invariant (LTI) system has consistent properties in response to standard test signal inputs. Those also appear in an error curve acquired from the response. From such properties, constructed is an error model for the position control of the feed drive. And then added is the output of the error model to the current error signal. Consequently the resulting proportional control system brings performance improvement in view of the steady-state error. The effectiveness of the proposed scheme is confirmed through simulations and experiments.

초기 매칭 에러를 통한 적응적 고속 움직임 예측 알고리즘 (An Adaptive and Fast Motion Estimation Algorithm using Initial Matching Errors)

  • 정태일
    • 한국멀티미디어학회논문지
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    • 제10권11호
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    • pp.1439-1445
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    • 2007
  • 본 논문에서는 기존의 PDE방법의 계산량을 줄이고 동시에 동일한 예측화질을 얻기 위해, 초기 매칭블록의 서브블록별 SAD값의 비교를 통한 고속 움직임 예측 알고리즘을 제안한다. 제안한 방법은 최초 매칭 블록의 서브블록별 매칭 에러의 복잡도의 비교를 통해 후보블록들의 매칭순서를 변경하여 불필요한 계산량을 줄이는 방법을 제안한다. 제안한 알고리즘은 예측 화질의 저하 없이 기존의 PDE(partial distortion elimination) 알고리즘을 이용한 전영역 탐색 방법에 비해 45%의 계산량을 줄였으며, MPEG-2 및 MPEG-4 AVC를 이용하는 비디오 압축 응용분야에 유용하게 사용될 수 있을 것이다.

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A Content Adaptive Fast PDE Algorithm for Motion Estimation Based on Matching Error Prediction

  • Lee, Sang-Keun;Park, Eun-Jeong
    • Journal of Communications and Networks
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    • 제12권1호
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    • pp.5-10
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    • 2010
  • This paper introduces a new fast motion estimation based on estimating a block matching error (i.e., sum of absolute difference (SAD)) between blocks which can eliminate an impossible candidate block much earlier than a conventional partial distortion elimination (PDE) scheme. The basic idea of the proposed scheme is based on predicting the total SAD of a candidate block using its partial SAD. In particular, in order to improve prediction accuracy and computational efficiency, a sub-sample based block matching and a selective pixel-based approaches are employed. In order to evaluate the proposed scheme, several baseline approaches are described and compared. The experimental results show that the proposed algorithm can reduce the computations by about 44% for motion estimation at the cost of 0.0005 dB quality degradation versus the general PDE algorithm.

국내 헬리콥터 조종사 인적오류 사고 분류 및 분석 (Classification and Analysis of Human Error Accidents of Helicopter Pilots in Korea)

  • 유태정;권영국;송병흠
    • 한국항공운항학회지
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    • 제28권4호
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    • pp.21-31
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    • 2020
  • There are two to three helicopter accidents every year in Korea, representing 5.7 deaths per 100,000 flights. In this study, an analysis was conducted on helicopter accidents that occurred in Korea from 2005 to 2017. The accident analysis was based on the aircraft accident and incident report published by the Aircraft and Railway Accident Investigation Board. This Research analyzed the characteristics of accidents occurring in Korea caused by human error by pilots. Accident analysis was done by classifying the organization, flight mission, aircraft class, flight stage, accident cause, etc. Pilot's huan error was classified as Skill-based error, decision error and perceptual error in accordance with the HFACS taxonomy. The accidents caused by pilot's human error were classified into five categories: powerlines collision, loss of control, fuel exhaustion, unstable approach to reservoir, and elimination of tail rotor.

최소자승법을 이용한 적응형 데이터 윈도우의 거리계전 알고리즘 (Distance Relaying Algorithm Based on An Adaptive Data Window Using Least Square Error Method)

  • 정호성;최상열;신명철
    • 대한전기학회논문지:전력기술부문A
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    • 제51권8호
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    • pp.371-378
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    • 2002
  • This paper presents the rapid and accurate algorithm for fault detection and location estimation in the transmission line. This algorithm uses wavelet transform for fault detection and harmonics elimination and utilizes least square error method for fault impedance estimation. Wavelet transform decomposes fault signals into high frequence component Dl and low frequence component A3. The former is used for fault phase detection and fault types classification and the latter is used for harmonics elimination. After fault detection, an adaptive data window technique using LSE estimates fault impedance. It can find a optimal data window length and estimate fault impedance rapidly, because it changes the length according to the fault disturbance. To prove the performance of the algorithm, the authors test relaying signals obtained from EMTP simulation. Test results show that the proposed algorithm estimates fault location within a half cycle after fault irrelevant to fault types and various fault conditions.

다중선형회귀모형에서의 변수선택기법 평가 (Evaluating Variable Selection Techniques for Multivariate Linear Regression)

  • 류나현;김형석;강필성
    • 대한산업공학회지
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    • 제42권5호
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    • pp.314-326
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    • 2016
  • The purpose of variable selection techniques is to select a subset of relevant variables for a particular learning algorithm in order to improve the accuracy of prediction model and improve the efficiency of the model. We conduct an empirical analysis to evaluate and compare seven well-known variable selection techniques for multiple linear regression model, which is one of the most commonly used regression model in practice. The variable selection techniques we apply are forward selection, backward elimination, stepwise selection, genetic algorithm (GA), ridge regression, lasso (Least Absolute Shrinkage and Selection Operator) and elastic net. Based on the experiment with 49 regression data sets, it is found that GA resulted in the lowest error rates while lasso most significantly reduces the number of variables. In terms of computational efficiency, forward/backward elimination and lasso requires less time than the other techniques.

자동 고장 판별 및 거리 측정 기능을 갖는 휴대용 케이블 고장 검출 장치 개발 (Development of Portable Cable Fault Detection System with Automatic Fault Distinction and Distance Measurement)

  • 김재진;전정채
    • 전기학회논문지
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    • 제65권10호
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    • pp.1774-1779
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    • 2016
  • This paper proposes a portable cable fault detection system with automatic fault distinction and distance measurement using time-frequency correlation and reference signal elimination method and automatic fault classification algorithm in order to have more accurate fault determination and location detection than conventional time domain refelectometry (TDR) system despite increased signal attenuation due to the long distance to cable fault location. The performance of the developed system method was validated via an experiment in the test field constructed for the standardized performance test of power cable fault location equipments. The performance evaluation showed that accuracy of the developed system is less than 1.34%. Also, an error of automatic fault type and location by detection of phase and peak value through elimination of the reference signal and normalization of correlation coefficient and automatic fault classification algorithm not occurred.

An On-Line Harmonic Elimination Pulse Width Modulation Scheme for Voltage Source Inverter

  • Salam, Zainal
    • Journal of Power Electronics
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    • 제10권1호
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    • pp.43-50
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    • 2010
  • This paper proposes a new harmonic elimination PWM (HEPWM) scheme for voltage source inverters (VSI) based on the curve fittings of certain polynomials functions. The resulting equations to calculate the switching angle of the HEPWM require only the addition and multiplication processes; therefore any number of harmonics to be eliminated and the fundamental amplitude of the pole switching waveform (NP1) can be controlled on-line. An extensive angle error analysis is carried out to determine the accuracy of the algorithm in comparison to the exact solution. To verify the workability of the technique, an experimental single phase VSI is constructed. The algorithm is implemented on a VSI using a 16-bit microprocessor. The results obtained from the test rig are compared to the theoretical prediction and the results of the MATLAB simulations.