• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.5C
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• pp.548-554
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• 2003

Interoperability is ole the most important factors for a successful integration of the speech network. To accomplish communication between endpoints employing different speech coders, decoder and encoder of each endpoint coder should be placed in tandem. However, tandem coder often produces problems such as poor speech quality, high computational load, and additional transmission delay. In this paper, we propose an efficient transcoding algorithm that can provide interoperability to the networks employing ITU-T G.723.1［1］and TIA IS-127 EVRC［2］speech coders. The proposed transcoding algorithm is composed of four parts: LSP conversion, open-loop pitch conversion, fast adaptive codebook search, and fast fixed codebook search. Subjective and objective quality evaluation confirmed that the speech quality produced by the proposed transcoding algorithm was equivalent to, or better than the tandem coding, while it had shorter processing delay and less computational complexity, which is certified implementing on TMS320C62x.

• Journal of Digital Convergence
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• v.12 no.3
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• pp.269-275
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• 2014

The DAB system was designed to provide CD quality audio and data services for fixed, portable and mobile applications with the required BER below $10^{-4}$. However for the T-DMB system with the video service of MPEG-4 stream, BER should go down $10^{-8}$ by adding FEC blocks which consist of the Reed-Solomon (RS) encoder/decoder and convolutional interleaver/deinterleaver. In this paper we propose two types of turbo coded T-DMB system without altering the puncturing procedure and puncturing vectors defined in the standard T-DMB system for compatibility. One(Type 1) can replace the existing RS code, convolutional interleaver and RCPC code by a turbo code and the other one (Type 2) can substitute the existing RCPC code by a turbo code. Simulation results show that two new turbo coded systems are able to yield considerable performance gain after just 2 iterations. Type 2 system is better than type 1 but the amount of performance improvement is small.

• The Journal of the Acoustical Society of Korea
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• v.20 no.1
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• pp.56-61
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• 2001

This paper presents the real-time implementation of an AMR (Adaptive Multi Rate) vocoder which is included in the asynchronous International Mobile Telecommunication (IMT)-2000 mobile ASIC. The implemented AMR vocoder is a multi-rate coder with 8 modes operating at bit rates from 12.2kbps down to 4.75kbps. Not only the encoder and the decoder as basic functions of the vocoder are implemented, but VAD (Voice Activity Detection), SCR (Source Controlled Rate) operation and frame structuring blocks for the system interface are also implemented in this vocoder. The DSP for AMR vocoder implementation is a 16bit fixed-point DSP which is based on the TeakLite core and consists of memory block, serial interface block, register files for the parallel interface with CPU, and interrupt control logic. Through the implementation, we reduce the maximum operating complexity to 24MIPS by efficiently managing the memory structure. The AMR vocoder is verified throughout all the test vectors provided by 3GPP, and stable operation in the real-time testing board is also proved.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.1
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• pp.51-57
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• 2016

This paper describes the physical layer modem structure of Giga KOREA 5G system which is being developed by ETRI as a 5G telecommunications prototype. The objective of Giga KOREA 5G system is supporting maximum 100 Gbps data rate for each cell with wide-bandwidth baseband station and mobile station prototypes in mmWave (10~40 GHz) environment. To achieve this objective, its physical layer is composed of high performance baseband station as well as mobile station and their OFDM TDD modems. The important features of Giga KOREA 5G physical layer are carrier aggregation, multiple receiving beam searching in mobile station, high data rate channel encoder and decoder and high speed modulation and demodulation functions.

• Journal of Broadcast Engineering
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• v.9 no.4 s.25
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• pp.371-383
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• 2004

In this paper we consider technological requirements to broadcast digital television signals using single frequency networks (SFN) in the Advanced Television Systems Committee (ATSC) transmission systems and propose equalization digital on-channel repeater (EDOCR) that overcomes the limitations of conventional digital on-channel repeaters (DOCRs). Since there are no forward error correction (FEC) decoder and encoder, the EDOCR does not have an ambiguity problem. In addition, since an adaptive equalizer in the EDOCR removes multi-path signals, additive white Gaussian noise (A WGN), and feedback signal due to low antenna isolation, the EDOCR may have good output signal quality with high power.

• Journal of Korea Society of Industrial Information Systems
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• v.25 no.2
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• pp.19-27
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• 2020

Recently, rapid and accurate 3D models creation is required in various applications using virtual reality and augmented reality technology. In this paper, we propose an on-site learning based shape deformation method which transforms the clothed 3D human model into the shape of an input point cloud. The proposed algorithm consists of two main parts: one is pre-learning and the other is on-site learning. Each learning consists of encoder, template transformation and decoder network. The proposed network is learned by unsupervised method, which uses the Chamfer distance between the input point cloud form and the template vertices as the loss function. By performing on-site learning on the input point clouds during the inference process, the high accuracy of the inference results can be obtained and presented through experiments.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.11
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• pp.561-572
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• 2001

Since energy consumption of CMOS circuits has a quadratic dependency on the supply voltage, lowering the supply voltage is the most effective way of reducing energy consumption. We propose an intra-task voltage scheduling algorithm for low-energy hard real-time applications. Based on a static timing analysis technique, the proposed algorithm controls the supply voltage within an individual task boundary. By fully exploiting all the slack times, as scheduled program by the proposed algorithm always complete its execution near the deadline, thus achieving a high energy reduction ratio. In order to validate the effectiveness of the proposed algorithm, we built a software tool that automatically converts a DVS-unaware program into an equivalent low-energy program. Experimental results show that the low-energy version of an MPEG-4 encoder/decoder (converted by the software tool) consumes less than 7~25% of the original program running on a fixed-voltage system with a power-down mode.

• Annual Conference of KIPS
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• 2019.05a
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• pp.451-454
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• 2019

In this paper, we propose a verifiable image transformation networks to transform face sketch to photo and vice versa. Face sketch-photo is very popular in computer vision applications. It has been used in some specific official departments such as law enforcement and digital entertainment. There are several existing face sketch-photo synthesizing methods that use feed-forward convolution neural networks; however, it is hard to assure whether the results of the methods are well mapped by depending only on loss values or accuracy results alone. In our approach, we use two Resnet encoder-decoder networks as image transformation networks. One is for sketch-photo and another is for photo-sketch. They depend on each other to verify their output results during training. For example, using photo-sketch transformation networks to verify the photo result of sketch-photo by inputting the result to the photo-sketch transformation networks and find loss between the reversed transformed result with ground-truth sketch. Likely, we can verify the sketch result as well in a reverse way. Our networks contain two loss functions such as sketch-photo loss and photo-sketch loss for the basic transformation stages and the other two-loss functions such as sketch-photo verification loss and photo-sketch verification loss for the verification stages. Our experiment results on CUFS dataset achieve reasonable results compared with the state-of-the-art approaches.

• Journal of the Korea Computer Industry Society
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• v.3 no.1
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• pp.57-66
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• 2002

In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast Fourier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi-valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like ［0,1,2,3］. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used as LUT(Look Up Table) Finally, for the compatibility with the binary system, multiple-valued hybrid-type FFT processor was proposed and designed using binary-four valued encoder, four-binary valued decoder, and the electric current mode CMOS circuit.

• Journal of Broadcast Engineering
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• v.24 no.3
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• pp.387-394
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• 2019

In this study, a new method of audio high-band coding based on autoencoder with side information is proposed. The proposed method operates in the MDCT domain, and improves the performance by using additional side information consisting of the previous and current low bands, which is different from the conventional autoencoder that only inputs information to be encoded. Moreover, the side information in a time-frequency domain enables the high-band coder to utilize temporal characteristics of the signal. In the proposed method, the encoder transmits a 4-dimensional latent vector computed by the autoencoder and a gain variable using 12 bits for each frame. The decoder reconstructs the high band by applying the decoded low bands in the previous and current frames and the transmitted information to the autoencoder. Subjective evaluation confirms that the proposed method provides equivalent performance to the SBR at approximately half the bit rate of the SBR.