• Journal of Broadcast Engineering
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• v.17 no.2
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• pp.252-261
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• 2012

This papers proposes a motion vector coding method which selects the optimal predictive motion vector after excluding some candidate predictive motion vectors in the minimum rate-distortion sense, and prunes the candidate predictive motion vectors by a contradiction testing that operates under a predefined criterion at both encoder and decoder for reducing the signaling information. Experimental results show that the proposed method gains in BDBR by up to 1.8% compared to the H.264/AVC.

• KIISE Transactions on Computing Practices
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• v.23 no.9
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• pp.542-549
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• 2017

Sequence-to-sequence models and similar pointer networks suffer from performance degradation when an input is composed of multiple sentences or when the length of the input sentence is long. To solve this problem, this paper proposes a hierarchical pointer network model that uses both the word level and sentence level information to encode input sequences composed of several sentences at the word level and sentence level. We propose a hierarchical pointer network based coreference resolution that performs a coreference resolution for all mentions. The experimental results show that the proposed model has a precision of 87.07%, recall of 65.39% and CoNLL F1 74.61%, which is an improvement of 21.83% compared to an existing rule-based model.

• Proceedings of the Korea Contents Association Conference
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• 2003.11a
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• pp.328-332
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• 2003

Since Jacquine introduced the image coding algorithm using fractal theory, many fractal image compression algorithms providing good quality at low bit rate have been proposed by Fisher and Beaumount et al.. But a problem of the previous implementations is that the decoding rests on an iterative procedure whose complexity is image -dependent. This paper proposes an iterative-free fractal image decoding algorithm to reduce the decoding time. In the proposed method, under the encoder previously with the same codebook image as an initial image to be used at the decoder, the fractal coefficients are obtained through calculating the similarity between the codebook image and a input image to be encoded. As the decoding process can be completed with received fractal coefficients and predefined initial image without repeated iterations, the decoding time could be remarkably reduced.

• Journal of Korea Multimedia Society
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• v.22 no.11
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• pp.1269-1279
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• 2019

In medical image analysis, segmentation is considered as a vital process since it partitions an image into coherent parts and extracts interesting objects from the image. In this paper, we consider automatic segmentations of OCT retinal images to find six layer boundaries using convolutional neural networks. Segmenting retinal images by layer boundaries is very important in diagnosing and predicting progress of eye diseases including diabetic retinopathy, glaucoma, and AMD (age-related macular degeneration). We applied well-known CNN architecture for general image segmentation, called Segnet, U-net, and CNN-S into this problem. We also proposed a shortest path-based algorithm for finding the layer boundaries from the outputs of Segnet and U-net. We analysed their performance on public OCT image data set. The experimental results show that the Segnet combined with the proposed shortest path-based boundary finding algorithm outperforms other two networks.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.11
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• pp.2465-2473
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• 2012

Recently, as one of low complexity video encoding methods, DVC (Distributed Video Coding) scheme has been actively studied. Most of DVC schemes exploit feedback channel to achieve better coding performances, however, this causes these schemes to have high decoding delay. In order to overcome these, this paper proposes a new fast DVC decoding method using parity-bit request model, which can be obtained by using bit-error rate, sent by encoder with motion vector, which is transmitted through feedback channel by decoder after generating side information. Through several simulations, it is shown that the proposed method improves greatly the decoding speed, compared to the conventional schemes.

• The Journal of the Acoustical Society of Korea
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• v.21 no.3
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• pp.237-244
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• 2002

In this paper we mention the optimization of MPEG-4 VM (Moving Picture Expert Group-4 Verification Model) GA (General Audio) AAC (Advanced Audio Coding) encoder and the design of the decoder for PDA (Personal Digital Assistant) using MPEG-4 VM source. We profiled the VMC source and several optimization methods have applied to those selected functions from the profiling. Intel Pentium III 600 MHz PC, which uses windows 98 as OS, takes about 20 times of encoding time compared to input sample running time, with additional options, and about 10 times without any option. Decoding time on PDA was over 35 seconds for the 17 seconds input sample. After optimization, the encoding time has reduced to 50% and the real time decoding has achieved on PDA.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.10
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• pp.11-15
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• 2015

In this paper, we introduce three modulation codes of the code rate 1/2 with different minimum distances, respectively, and investigate the performance of the codes according to the minimum distance. We simulate the codes in accordance with blur and misalignment. As the minimum distance increases, the complexity of encoder and decoder also grows. However, it can improve the error correcting capability and shows good performance with blur and misalignment.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.6
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• pp.141-148
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• 2009

Space-time block codes (STBC) have no coding gain but they provide a full diversity gain with relatively low encoder/decoder complexity. Therefore, STBC should be concatenated with an outer code which provides an additional coding gain. In this paper, we consider the concatenation of multiple trellis-coded modulation (MTCM) codes with STBC for achieving significant coding gain with full antenna diversity. Using criteria of equal transmit power, spectral efficiency and the number of trellis states, the performance of concatenated scheme is compared to that of previously known space-time trellis codes (STTC) in terms of frame error rate (FER). Simulation results show that MTCM codes concatenated with STBC offer better performance on fast Rayleigh fading channels, than previously known STTC with two transmit antennas and one receive antenna.

• Journal of Communications and Networks
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• v.12 no.2
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• pp.168-173
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• 2010

Error concealment techniques are significant due to the growing interest in imagery transmission over error-prone channels. This paper presents a spatial error concealment technique for losslessly compressed images using least significant bit (LSB)-based data hiding to reconstruct a close approximation after the loss of image blocks during image transmission. Before transmission, block description information (BDI) is generated by applying quantization following discrete wavelet transform. This is then embedded into the LSB plane of the original image itself at the encoder. At the decoder, this BDI is used to conceal blocks that may have been dropped during the transmission. Although the original image is modified slightly by the message embedding process, no perceptible artifacts are introduced and the visual quality is sufficient for analysis and diagnosis. In comparisons with previous methods at various loss rates, the proposed technique is shown to be promising due to its good performance in the case of a loss of isolated and continuous blocks.

• ETRI Journal
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• v.22 no.1
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• pp.20-29
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• 2000

In this paper, we present a design of video and audio single chip encoder/decoder for portable multimedia application. The single-chip called as video audio signal processor (VASP) consists of a video signal processing block and an audio single processing block. This chip has mixed hardware/software architecture to combine performance and flexibility. We designed the chip by partitioning between video and audio block. The video signal processing block was designed to implement hardware solution of pixel input/output, full pixel motion estimation, half pixel motion estimation, discrete cosine transform, quantization, run length coding, host interface, and 16 bits RISC type internal controller. The audio signal processing block is implemented with software solution using a 16 bits fixed point DSP. This chip contains 142,300 gates, 22 Kbits FIFO, 107 kbits SRAM, and 556 kbits ROM, and the chip size is $9.02mm{\times}9.06mm$ which is fabricated using 0.5 micron 3-layer metal CMOS technology.