• Journal of Communications and Networks
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• v.8 no.3
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• pp.275-285
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• 2006

Suitable for multi-input multi-output (MIMO) communications, the joint beamforming space-time block coding (JBSTBC) scheme is proposed for high-speed downlink transmission. The major functionality of the scheme entails space-time block encoder and joint transmit and receive eigen-beamformer (EBF) incorporating with block-ordered layered decoder (BOLD), and its operating principle is described in this paper. Within these functionalities, the joint EBFs will be utilized for decorrelating fading channels to cause an enhancement in the spatial diversity gain. Furthermore, to fortify the capability of layered successive interference cancellation (LSIC) in block-ordered layered decoding process, this paper will develop a simple ad-hoc transmit power discrimination scheme (TPDS) based on a particular power discrimination function (PDF). To confirm the superior behavior of the proposed JBSTBC scheme employing ad-hoc TPDS, computer simulations will be conducted under various channel conditions with the provision of detailed mathematical derivations for clarifying its functionality.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.10 no.3
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• pp.147-152
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• 1985

The error-trapping decoder is constructed for the (7, 3) Reed-Solomon code. The syndrome resister is constructed with the encoder and the substanial test logic circuits. The element of GF(8) is represented by the triple D-flip-floops. The hardware is constructed. And it is controlled by the micro computer(Apple II). The time for the encoding and the decoding were $350\musecs and 910u secs respectively. The experimental results show that the two symbol errors were corrected and 4-bit-binary-burst errors were also corrected.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.7
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• pp.995-1002
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• 2013

In this paper, an effort has been made to design a Real-time Ship Management System where the status of a ship and its surrounding are constantly monitored and recorded at the base station. Proprietary system message based on overhead and checksum encapsulation has been designed to facilitate the communication. Software encoder and decoder are developed independently for each communication device attached to the system to process the proprietary system message into format by device standard. In addition, few configurations are designed to determine the method of updating the ship status message to the base station, which could be remotely chosen by the administrator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.8
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• pp.1691-1697
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• 1997

This paper presents a new motion compensated error coding method suitable for region based image coding system. Compared with block based conding, the region based coding improves subjective quality as it estimates and compensates 2D (or 3D) translantional, rotational, and scaling motion for each regions. although the region based coding has this advantage, its merit is reduced as bock-DCT (2D-DCT) is used to encode motion-compensated error. To overcome this problem, a new region adaptive motion compensated error coding technique which improver subjective and objective quality in the region boundary is proposed in this paper. In the proposed method, regions with large error are estimated using contour of the regions and contrast between the regions. The regions estiated as those with large error are coded by arbitrarily shaped image segment coding method. The mask information of the coded regions is not transmitted because it is estimated as the same algorithm in the encoder and the decoder. The proposed region adaptive motion conpensated error coding method improves about 0.5dB when it is compared with conventional block based method.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.403-406
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• 1987

CMOS operational amplifier is most useful building bloch in analog circuit. This paper represents the analysis and design method of CMOS OP AMP to use general purpose such as the A/D and D/A converter, PCM encoder and decoder etc. The required specifications is obtained by changing W/L ration of CMOS devices. The design procedure must be iterative in as much as it is almost impossible to relate all specifications simultaneously. This is performanced with IBM-PC XT by using SPICE(SIMULATION PROGRAM WITH INTEGRATED CIRCUIT EMPHASIS)program.

• Journal of Information Processing Systems
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• v.10 no.1
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• pp.69-80
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• 2014

The free distance of (n, k, l) convolutional codes has some connection with the memory length, which depends on not only l but also on k. To efficiently obtain a large memory length, we have constructed a new class of (2k, k, l) convolutional codes by (2k, k) block codes and (2, 1, l) convolutional codes, and its encoder and generation function are also given in this paper. With the help of some matrix modules, we designed a single structure Viterbi decoder with a parallel capability, obtained a unified and efficient decoding model for (2k, k, l) convolutional codes, and then give a description of the decoding process in detail. By observing the survivor path memory in a matrix viewer, and testing the role of the max module, we implemented a simulation with (2k, k, l) convolutional codes. The results show that many of them are better than conventional (2, 1, l) convolutional codes.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1999.06b
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• pp.79-86
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• 1999

본 논문에서는 ISO/IEC MPEG-2 AAC 표준을 기반으로 한 멀티채널 오디오 인코더 및 디코더(MASIC) 시스템의 실시간 구현 기술에 대해서 기술한다. MPEG-2 AAC 기술은 멀티채널 오디오 부호화 방식의 국제 표준으로써, 지금까지 개발된 멀티채널 오디오 부호화 방식중 최신의 기술이며, 압축율과 오디오 품질이 가장 우수한 것으로 알려져 있다. MASIC 시스템은 인코딩 및 디코딩 기술의 실시간 처리를 위하여 범용 DSP인 TMS320C6701을 사용하였고, 멀티채널 오디오의 고속 입력과 출력을 위한 디지털 인터페이스를 가지고 있으며, 개인용 컴퓨터와의 인터페이스를 위한 PCI 기술이 적용되어 다양한 입출력 모드를 지원하는 특징을 갖는다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.201-204
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• 2006

A system realization for real time DVR system with robust video watermarking algorithm against is attacked various is presented in this paper. The main system is composed of DSP processor and robust video watermarking to be processed at real time on image data and algorithm of the DVR system. The experimental result shows that the processing time takes about 2.5ms on the D1 size image per frame.

• Journal of Information Processing Systems
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• v.1 no.1 s.1
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• pp.27-31
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• 2005

Vehicle detector system based on image processing technology is a significant domain of ITS (Intelligent Transportation System) applications due to its advantages such as low installation cost and it does not obstruct traffic during the installation of vehicle detection systems on the road[1]. In this paper, we propose architecture for vehicle detection by using image processing. The architecture consists of two main parts such as an image processing part, using high speed FPGA, decision and calculation part using CPU. The CPU part takes care of total system control and synthetic decision of vehicle detection. The FPGA part assumes charge of input and output image using video encoder and decoder, image classification and image memory control.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.561-564
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• 2009

This paper present design and implementation of U-city infrared image surveillance system based on the digital media processor. The hardware is designed and implemented by using commercial chips such as DM642 processor and video encoder, video decoder and the functions of software are to analyze temperature distribution of a monitoring image and to monitor disaster situation such as fire. The required functions and performances are confirmed by testing of the prototype and we verified practicality of the system.