• Title/Summary/Keyword: encoder- decoder

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Enhanced source controlled variable bit-rate scheme in a waveform interpolation coder (Source controlled variable bit-rate scheme을 이용한 파형 보간 부호화기의 음질 개선 기법)

  • Cho, Keun-Seok;Yang, Hee-Sik;Jeong, Sang-Bae;Hahn, Min-Soo
    • Proceedings of the KSPS conference
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    • 2007.05a
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    • pp.315-318
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    • 2007
  • This paper proposes the methods to enhance the speech quality of source controlled variable bit-rate coder based on the waveform interpolation. The methods are to estimate and generate the parameters that are not transmitted from encoder to decoder by the repetition and extrapolation schemes. For the performance evaluation, the PESQ(Perceptual Evaluation of Speech Quality) scores are measured. The experimental results shows that our proposed method outperforms the conventional source controlled variable bit-rate coder. Especially, the performance of the extrapolation method is better than that of the repetition method.

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Implementation of DSP Embeded ASIC for Multimedia Communicatioin (멀티미디어 통신용 Vocoder 갭라용 DSP Embeded ASIC 개발)

  • 성유나
    • Proceedings of the Acoustical Society of Korea Conference
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    • 1998.08a
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    • pp.165-168
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    • 1998
  • 제안하고 있는 CSD17C00 chip은 C&S technology에서 개발한 것으로, 음성 신호 처리를 위해 범용으로 구현되었으며, 16 bit 40 MIPS DSP group OAK DSP Core를 포함, 이에 Miscellaneous Logic, Serial Port, Host Interface, Timer, Compander 의 5가지 Peripherals 과 범용 I/O Ports 로 설계되었다. 1차적으로 CSD17C00 Chip 의 성능을 점검하였다. 그 결과, 응용 프로그램은 28MIPS의 계산속도를 갖으며, 프로그램 ROM 크기는 8.85KWords 이고, 10KWords 의 데이터 ROM 과 4KWords 데이터 RAM을 필요로 한다. CSD17C00 CHIP은 멀티미디어 통신용 VOCODER 개발을 위한 범용성을 갖추고 있으며, VOCODER 용 S/W 개발 환경 및 H/W 구조가 여타 범용 DSP에 비해편의성고 K합리성을 제공하도록 설계되어 있다. 따라서, 이를 이용한다면, 멀티 미디어 통신용 VOCODER, INTERNET PHONE CO-PROCESSOR, DIGITAL RECODER, MPEG AUDIO ENCODER & DECODER 등 다양한 제품으로의 응용이 가능할 것으로 전망된다.

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A study on the implementation of an ASN.1 toll set for various macro processing (다양한 마크로 처리를 위한 ASN.1 도구 세트의 구현에 관한연구)

  • 김홍렬;임제탁
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.6
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    • pp.1-10
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    • 1996
  • Protocol specifications and service definitions for distributed open system applications are defined using ASN.1. Therefore, to implement an open system application likes MHS, it is necessary to have well defined encoding/decoding modules which translate ASN.1 protocol specifications into their transfer syntaxes. However, that work is usually tedius, time consuming, and error prone. In this paper, we designed and implemented a new ASN.1 tool set which includes a new ASN.1 run-time library, called HY BER/DER, and an enhanced ASN.1-to-C compiler, called HYASNC$^{+}$. HYASNC$^{+}$ automatically generates C language encoder/decoder stub files and heder files for basic ASN.1 types and subtypes defiend in X.208 recommandation, and all X400 MHS system macro definitions. And, we evaluated the performance of HYASNC$^{+}$ compiler and HY BER/DER run-tiem library, and tested the interoperability of ASN.1 run-time library.

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Accumulation Encoding Technique Based on Double Random Phase Encryption for Transmission of Multiple Images

  • Lee, In-Ho
    • Journal of the Optical Society of Korea
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    • v.18 no.4
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    • pp.401-405
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    • 2014
  • In this paper, we propose an accumulation encoding scheme based on double random phase encryption (DRPE) for multiple-image transmission. The proposed scheme can be used for a low-complexity DRPE system due to the simple structure of the accumulation encoder and decoder. For accumulation encoding of multiple images, all of the previously encrypted data are added, and hence the accumulation encoding can improve the security of the DRPE-encrypted data. We present a scheme for encryption and decryption for DRPE-based accumulation encoding, and a method for accumulation encoding and decoding. Finally, simulation results verify that the DRPE-based accumulation encoding scheme for multiple images is powerful in terms of data security.

Design of a new VLSI architecture for morphological filters (새로운 수리형태학 필터 VLSI 구조 설계)

  • 웅수환;선우명훈
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.8
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    • pp.22-38
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    • 1997
  • This paper proposes a new VLSI architecture for morphological filters and presents its chip design and implementation. The proposed architecture can significantly reduce hardware costs compared with existing architecture by using a feedback loop path to reuse partial results and a decoder/encoder pair to detect maximum/minimum values. In addition, the proposed architecture requires one common architecture for both diltion and erosion and fewer number of operations. Moreover, it can be easily extended for larger size morphologica operations. We developed VHDL (VHSIC hardware description language) models, performed logic synthesis using the SYNOPSYS CAD tool. We used the SOG (sea-of-gate) cell library and implemented the actual chip. The total number of gates is only 2,667 and the clock frequency is 30 MHz that meets real-time image processing requirements.

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Performance Analysis of A Variable Bit Rate Speech Coder (가변 비트율 음성 부호화기의 성능분석)

  • Iem, Byeong-Gwan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.12
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    • pp.1750-1754
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    • 2013
  • A variable bit rate speech coder is presented. The coder is based on the observation that a speech signal can be viewed as a combination of piecewise linear signals in a short time period. The encoder detects the sample points where the slope of the signal changes, which are called the inflection points in this paper. The coder transmits the location and value for the detected inflection sample, but only the location information for the noninflection samples. In the decoder, the noninflection samples are estimated with interpolation of the received information. Several factors affecting the performance of the coder have been tested through simulation. Simulation results show that the linear interpolation produces 1 ~ 5 dB improvement over the cubic spline interpolation. And the -law companding does not provide any benefit when it is applied before the inflection detection. With low threshold values in the inflection point detection, the coder shows better MOS and more than 16 dB improvement in SNR compared to the continuously variable slope delta modulation (CVSDM).

Integrated Multimedia Application Format for Active Video Browsing and Retrieval (효율적인 비디오 브라우징 및 검색을 위한 통합 멀티미디어 응용 형식)

  • Cho, Jun-Ho;Jin, Sung-Ho;Yang, Seung-Ji;Ro, Yong-Man
    • Annual Conference of KIPS
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    • 2005.11a
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    • pp.155-158
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    • 2005
  • 본 논문에서는 MPEG 의 멀티미디어 응용 표준인 MAF(Multimedia Application Format)를 기반으로, 효율적인 비디오 콘텐츠의 검색 및 활용을 위한 통합 미디어 구조, 즉 비디오 MAF 를 제안한다. 제안하는 비디오 MAF 는 ISO 미디어 포맷을 기반으로 하고 단일의 비주얼 스트림과 다중 음성을 지원하기 위한 다수의 오디오 스트림, 내용기반의 정보를 포함하는 메타데이터, 그리고 비디오 콘텐츠의 대표 이미지를 동시에 포함하는 구조이다. 제안하는 파일포맷의 유용성을 검증하기 위해 비디오 MAF 로 생성 및 해석할 수 있는 부호기(encoder)와 복호기(decoder)를 설계하고 구현하여, 통합 미디어에 내재된 메타데이터를 이용한 효율적인 검색과 멀티트랙의 오디오 스트림을 활용한 다중 음성에 대한 지원이 가능함을 확인하였다. 또한 내재된 대표이미지는 비디오 콘텐츠에 대한 브라우징이 효과적으로 활용됨을 확인하였다.

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Distributed Video Coding for Illumination Compensation of Multi-view Video

  • Park, Sean-Ae;Sim, Dong-Gyu;Jeon, Byeung-Woo
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.4 no.6
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    • pp.1222-1236
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    • 2010
  • In this paper, we propose an improved distributed multi-view video coding method that is robust to illumination changes among different views. The use of view dependency is not effective for multi-view video because each view has different intrinsic and extrinsic camera parameters. In this paper, a modified distributed multi-view coding method is presented that applies illumination compensation when generating side information. The proposed encoder codes DC values of discrete cosine transform (DCT) coefficients separately by entropy coding. The proposed decoder can generate more accurate side information by using the transmitted DC coefficients to compensate for illumination changes. Furthermore, AC coefficients are coded with conventional entropy or channel coders depending on the frequency band. We found that the proposed algorithm is about 0.1~0.5 dB better than conventional algorithms.

ROBUST TRANSMISSION OF VIDEO DATA STREAM OVER WIRELESS NETWORK BASED ON HIERARCHICAL SYNCHRONIZATION

  • Jung, Han-Seung;Kim, Rin-Chul;Lee, Sang-Uk
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1998.06b
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    • pp.5-9
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    • 1998
  • In this paper, we propose an error-resilient transmission technique for the H.263 video data stream over wireless networks. The proposed algorithm employs bit rearrangement hierarchically, providing the robust and exact synchronization against the bit errors, without requiring extra redundant information. In addition, we propose the recovery algorithm for the lost or erroneous motion vectors. We implement the encoder and decoder, based on the H.263 standard, and evaluate the proposed algorithm through intensive computer simulation. The experimental results demonstrate that the proposed algorithm yields good image quality, in spite of the channel errors, and prevents the error propagation both in the spatial and the temporal domain efficiently.

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Implementation of JPEG Encoder and Decoder with SystemC (SystemC를 이용한 JPEG 인코더/디코더의 구현)

  • You, Myoung-Keun;Song, Gi-Yong
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2006.06a
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    • pp.89-92
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    • 2006
  • 본 논문에서는 SystemC를 이용하여 데이터를 압축하는 JPEG의 인코더와 디코더 구현에 대하여 기술한다. SystemC는 SoC의 설계생산성을 높이기 위해 high-level abstraction에 기반하여 시스템을 모델링하고 명시하는 시스템 수준 설계 언어이고, JPEG은 DCT와 Huffman 코드를 이용하여 정지영상 정보를 압축하는 알고리즘이다. 설계된 JPEG 인코더와 디코더 모듈의 동작을 검증하기 위하여 인코더 모듈에 $16{\times}16$ 크기의 픽셀 RGB 데이터를 입력하고, 디코더 모듈에 인코더 모듈의 출력을 입력으로 연결하여 최종 출력되는 데이터를 비교 및 분석하여 확인하였다.

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