• Title/Summary/Keyword: emulator

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Development of the Emulator on Propulsion System (추진시스템 신호모사장비 개발)

  • Chung, Soon-Bae;Kim, Jung-Hoi;Park, Kon-Kuk;Kim, Young-Sam
    • Proceedings of the Korean Society of Propulsion Engineers Conference
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    • 2008.11a
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    • pp.431-432
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    • 2008
  • In order to develop and inspect the electronic controller of propulsion system, It must emulate the electronic signal similar to actual signal. The applied signals on propulsion system are engine speed, turbine speed, various kinds of temperatue signal, pressure signal, LVDT/RVDT position signal and so forth. Contents are the development of emulator that simulate the electronic signals similar to actual signals.

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Memory Access Tracing for Device DMA operations using Full System Emulator (Full System Emulator를 사용한 디바이스 DMA 동작의 메모리 접근 추적기법)

  • Jang, Ikjoon
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.11a
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    • pp.75-78
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    • 2012
  • 디바이스 드라이버의 결함은 시스템 실패의 주요 원인이다. 임베디드 디바이스 드라이버는 세심히 검증되어야 하지만, 디바이스 드라이버는 디바이스 동작에 큰 연관이 있기 때문에 단독으로 검증하기 어렵다. 비동기적인 디바이스의 DMA 동작들은 보통 복잡한 구조를 가질 수 있으며 비결정적인 조건상에서 발생하는 문제가 있을 경우 재현하기가 매우 어렵다. 이러한 관점에서, 실제와 동일한 인터페이스를 가지고 있는 가상 디바이스를 사용하게 되면, 코드의 변경 없이 디바이스 내부 상태 변화를 관찰 할 수 있다. 본 논문에서는 가상 디바이스를 활용하여 DMA 동작과 CPU 의 메모리 접근간의 충돌을 감시할 수 있는 방법을 제시한다. 가상 임베디드 시스템을 QEMU full system emulator 상에서 동작시키고, CPU 와 가상디바이스의 시스템 버스에 대한 메모리 접근을 추적하는 기능을 개발하였다.

Study on Active Power Filter using Real-time Hardware In the Loop Emulator

  • Zhang, Ying-hao;Oh, Hyoung-lok;Lim, Han-jun
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.132-133
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    • 2014
  • This paper presents an algorithm for an active power filter which can be used in both single-phase and three-phase electric system. The proposed algorithm focuses on the extraction of harmonic component of load current in each phase and in order to verify the validity of the proposed algorithm while loads are nonlinear, simulations have been done by PLECS software and tested by typhoon-HIL which is real time emulator.

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Implementation of Virtual Reader and Tag Emulator System Using DSP Board (DSP 보드를 이용한 가상의 리더와 태그 에뮬레이터 시스템 구현)

  • Kim, Young-Choon;Joo, Hae-Jong;Choi, Hae-Gill;Cho, Moon-Taek
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.10
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    • pp.3859-3865
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    • 2010
  • Modeling a virtual reader and tags, the emulator system is realized by using a commercial signal generation device to make signal, a data collection equipment, and DSP board. By using a Virtual UHF RFID (860 ~ 960 [MHz]) reader/tags module, a developed RFID reader, protocol of tag, and properties of RF support to provide the way how to verify the suitability to international standards (ISO 18000-6 Type C, EPCglobal C1G2). In this paper, to implement a proposed model reader and tag model, Visual DSP is applied by using DSP board, composing the system's signal generators, signal analyzers and performance verification, the target readers or tags, RFID emulator control computesr and control programs.

Development of Dynamic Magnetic Field Emulator for Smart Multi-Card (스마트멀티카드를 위한 동적자장모사장치의 개발)

  • Bae, Jae-Ho
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.40 no.4
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    • pp.183-190
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    • 2017
  • This paper proposes a dynamic magnetic field emulator (DMFE), which can electrically emulate information for the magnetic stripes of most widely used credit cards. Payment transactions with most common credit cards are performed by reading the card's information, encoded in magnetic stripes, using the reader head of a point-of-sale (POS) system. A stripe-type permanent magnet is attached to the back side of the credit card, and information for payments or value-added service is reorganized by exposing it to strong magnetic field. The process of data recording and retrieving as stated above has been pointed out as a major cause of illegal credit card use, because the information on the magnetic stripe is always exposed, and is thus vulnerable to forgery or alteration. A dynamic magnetic field emulator displays card information only when necessary by using the principle of solenoidal magnets. The DMFE proposed in this paper can prevent fraudulent use if it is operated with a device, like a smart phone, or a separate user-authentication procedure. In addition, because it is possible to display various information as needed, it can be utilized for a smart multi-card application, in which information for multiple cards is stored in one card, and can be selected and used as needed. This paper introduces the necessity of the DMFE and its manufacturing principles. As a result, this study will be helpful for making various application cases in payment, which is a core area of the Fintech (a newly-coined word of finance and technology) industry.

Design and Implementation of Emulator for Standard Conformance Test of Active RFID (능동형 RFID의 표준적합성 시험용 에뮬레이터 설계 및 구현)

  • Song, Tae-Seung;Kim, Tae-Yeon;Lyou, Joon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.5
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    • pp.201-208
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    • 2008
  • An active RFID system has the advantages of a long identification distance and a good identification rate as well as overcoming the passive RFID's drawback such as the lowering of identification rate on metal materials. So, the development of an active RFID system has been gradually increasing in harbor logistics and the national defense area. On the other hand, some identification failures between products developed under the same standards have been reported, and there are difficulties in evaluating the interoperability between developed Products and standard conformance test because an accurate evaluation method and equipment has not been established at the international level. Motivated by these, this study presents a realization of the hardware and software of emulator to evaluate the standard conformance of an active RFID system, Performance of the designed system are then analyzed by means of simulations of Matlab/Simulink, and the applicability of the emulator is verified by evaluating the standard conformance of a real active RFID tag.

A Detecting Method of Polymorphic Virus Using Advanced Virtual Emulator (개선된 가상 에뮬레이터를 이용한 다형성 바이러스 탐지 방법)

  • Kim, Du-Hyeon;Baek, Dong-Hyeon;Kim, Pan-Gu
    • The KIPS Transactions:PartC
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    • v.9C no.2
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    • pp.149-156
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    • 2002
  • Current vaccine program which scans virus code patterns has a difficult to detect the encrypted viruses or polymorphic viruses. The decryption part of polymorphic virus appears to be different every time it replicates. We must monitor the behavior of the decryption code which decrypts the body of the virus in order to detect these kinds of viruses. Specialty, it is not easy for the existing methods to detect the virus if the virus writer has modified the loop count of execution intentionally. In this paper, we propose an advanced emulator using a new algorithm so as to detect various kinds of polymorphic viruses. As a result of experiment using advanced emulator, we found that our proposed method has improved the virus detecting rate about 2%. In addition, our proposed system has a merit that it runs on not only MS-Windows but also Linux, and Unix-like Platform.

Simulation of Fuzzy Shape Control for Cold-Rolled Strip with Randomly Irregular Strip Shape (임의 불량형상을 갖는 냉연판의 퍼지형상제어 시뮬레이션)

  • Jung, Jong-Yeob;Im, Yong-Taek
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.20 no.3
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    • pp.861-871
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    • 1996
  • In this study, a fuzzy control algorithm was developed for the randomly irregular shape of cold-rolled strip. Currently developed fuzzy control algorithm consists of two parts: the first part calculates the changes of work and intermediate roll bender forces based on the symmetric part of the irregular strip shape, and the second part calculates the weighting factors based on the asymmetric part and modifies the pre-determined roll bender forces according to the weighting factors. As a result of this, bender froces applied at the both sides of the cold-rolled strip were different. In order to simulate the continuous shape control. fuzzy controller developed was linked with emulator which was developed based on neural network. The fuzzy controller and emulator developed simulated the cold rolling process until irregular shape converged to a tolerable range in producing uniform cross-sectional strip shape. The results obtained from the simulation were reasonable for various irregular strip shapes.

An Implementation of a Virtual RFID Emulator System using a Commercial CAD tool (상용 CAD 툴을 이용한 RFID 에뮬레이터 시스템 구현)

  • Lim, Hyung-Mu;Bae, Sung-Woo;Jung, Myung-Sub;Jang, Byung-Jun;Kim, Jun-O;Park, Jun-Seok;Seong, Yeong-Rak;Oh, Ha-Ryoung
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.1049-1054
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    • 2005
  • With the growth of RFID market in logistics industry, such as post office, airline, shipping etc., development of RFID readers and tags becomes crucial. Especially, $860{\sim}960MHz$ RFID is worth noticing because of its long identification range and low production cost. Therefore, performance tests and verification of reader and/or tag under development are very important. In this paper, a RFID emulator system is designed and implemented using a commercial CAD tool, a signal generator and a data acquisition device. With the RFID emulator system, many parameters such as spectrum masks, transmit power levels, data waveform and other RF characteristics can be analyzed. Furthermore it can be applied to the verification of real RFID Readers or Tags.

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REGO: REconfiGurable system emulatOr (레고 : 재구성 가능한 시스템 에뮬레이터)

  • Kim, Nam-Do;Yang, Se-Yang
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.2
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    • pp.91-103
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    • 2002
  • For massive FPGA based emulator, the interconnection architecture and the transmission method of signals between FPGA's are important elements which decide speed of emulation and extendability of emulator. Existing FPGA-based emulation system is faced the problems of which the emulation speed getting slow drastically as the complexity of circuit increases. In this paper, we proposed a new innovative emulation architecture that has high resource usage rate and makes the fast emulation Possible. The emulator with very unique hierarchical ring topology Presented here has merits to overcome FPGA pin limitation by connecting each FPGA into a set of pipelined rings, and it also makes emulation speed at the tens of MHz at least even at system level where the verification complexity can easily exceed the verification capability of designers.