• Title/Summary/Keyword: embedded inductor

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Characteristic Prediction and Analysis of 3-D Embedded Passive Devices (3차원 매립형 수동소자의 특성 예측 및 분석에 대한 연구)

  • Shin, Dong-Wook;Oh, Chang-Hoon;Lee, Kyu-Bok;Kim, Jong-Kyu;Yun, Il-Gu
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.607-610
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    • 2003
  • The characteristic prediction and analysis of 3-dimensional (3-D) solenoid-type embedded inductors is investigated. The four different structures of 3-D inductor are fabricated by using low-temperature cofired ceramic (LTCC) process. The circuit model parameters of the each building block are optimized and extracted using the partial element equivalent circuit method and HSPICE circuit simulator. Based on the model parameters, predictive modeling is applied for the structures composed of the combination of the modeled building blocks. And the characteristics of test structures, such as self-resonant frequency, inductance and Q-factor, are analyzed. This approach can provide the characteristic conception of 3-D solenoid embedded inductors for structural variations.

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PCB Embedded Spiral Inductors for low cost RF SOP Applications (저가형 RF SOP 응용을 위한 임베디드 인덕터에 관한 연구)

  • Lee, Hwan-H.;Park, Jae-Y.;Lee, Han-S.
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1301-1302
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    • 2006
  • In this paper, embedded spiral inductors are investigated into the PCB substrate for low cost RF SOP applications. The spiral inductors designed with geometrical variations were simulated, fabricated, measured, and characterized by using 3D EM simulator, 8 layered PCB standard process and HP 8510B network analyzer (or verifying their applicability. The fabricated embedded spiral inductor has inductance of 9.4 nH at 800MHz, maximum quality factor of 64.8 at 1.09GHz and self resonant frequency of 3.93GHz, respectively. As the measured inductances and quality factors are well matched with simulated ones. PCB embedded spiral inductors are promising for advanced electronic systems with various functionality, low cost, small size and volume.

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Piecewise Regression Model for Solenoid Embedded Inductors Based on the Quasi-newton Method

  • Ko, Young-Don;Kim, Kil-Han;Yun, Il-Gu;Lee, Kyu-Bok;Kim, Jong-Kyu
    • Transactions on Electrical and Electronic Materials
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    • v.6 no.6
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    • pp.256-261
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    • 2005
  • This paper presents that the modeling to predict the characteristics with respect to the performance of solenoid embedded inductors manufactured by LTCC process via the nonlinear regression model based on the quasi-Newton method. In order to reduce the runs, the design of experiments (DOE) was used to generate the design space. The nonlinear process models were constructed by the piecewise regression model based on the quasi-Newton method for estimating the model coefficient with the break point on the statistical confidence intervals. Those models were verified by the model accuracy checking based on the assumption statistically.

Fully Embedded 2.4GHz Compact Band Pass Filter into Multi-Layered Organic Packaging Substrate

  • Lee, Seung-J.;Lee, Duk-H.;Park, Jae-Y.
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.1
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    • pp.39-44
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    • 2008
  • In this paper, fully embedded 2.4GHz WLAN band pass filter (BPF) was investigated into a multi-layered organic packaging substrate using high Q spiral stacked inductors and high Dk MIM capacitors for low cost RF System on Package (SOP) applications. The proposed 2.4GHz WLAN BPF was designed by modifying chebyshev second order filter circuit topology. It was comprised of two parallel LC resonators for obtaining two transmission zeros. It was designed by using 2D circuit and 3D EM simulators for finding out optimal geometries and verifying their applicability. It exhibited an insertion loss of max -1.7dB and return loss of min -l7dB. The two transmission zeros were observed at 1.85 and 6.7GHz, respectively. In the low frequency band of $1.8GHz{\sim}1.9GHz$, the stop band suppression of min -23dB was achieved. In the high frequency band of $4.1GHz{\sim}5.4GHz$, the stop band suppression of min -l8dB was obtained. It was the first embedded and the smallest one of the filters formed into the organic packaging substrate. It has a size of $2.2{\times}1.8{\times}0.77mm^3$.

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An autonomous synchronized switch damping on inductance and negative capacitance for piezoelectric broadband vibration suppression

  • Qureshi, Ehtesham Mustafa;Shen, Xing;Chang, Lulu
    • International Journal of Aeronautical and Space Sciences
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    • v.17 no.4
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    • pp.501-517
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    • 2016
  • Synchronized switch damping (SSD) is a structural vibration control technique in which a piezoelectric patch attached to or embedded into the structure is connected to or disconnected from the shunt circuit in order to dissipate the vibration energy of the host structure. The switching process is performed by a digital signal processor (DSP) which detects the displacement extrema and generates a command to operate the switch in synchronous with the structure motion. Recently, autonomous SSD techniques have emerged in which the work of DSP is taken up by a low pass filter, thus making the whole system autonomous or self-powered. The control performance of the previous autonomous SSD techniques heavily relied on the electrical quality factor of the shunt circuit which limited their damping performance. Thus in order to reduce the influence of the electrical quality factor on the damping performance, a new autonomous SSD technique is proposed in this paper in which a negative capacitor is used along with the inductor in the shunt circuit. Only a negative capacitor could also be used instead of inductor but it caused saturation of negative capacitor in the absence of an inductor due to high current generated during the switching process. The presence of inductor in the shunt circuit of negative capacitor limits the amount of current supplied by the negative capacitance, thus improving the damping performance. In order to judge the control performance of proposed autonomous SSDNCI, a comparison is made between the autonomous SSDI, autonomous SSDNC and autonomous SSDNCI techniques for the control of an aluminum cantilever beam subjected to both single mode and multimode excitation. A value of negative capacitance slightly greater than the piezoelectric patch capacitance gave the optimum damping results. Experiment results confirmed the effectiveness of the proposed autonomous SSDNCI technique as compared to the previous techniques. Some limitations and drawbacks of the proposed technique are also discussed.

$SrTiO_3$/유기물 복합재료 기반의 내장형 수동소자 구현

  • Lee, Gwang-Hoon;Yoo, Chan-Sei;Yoo, Myong-Jae;Park, Se-Hoon;Kim, Dong-Su;Lee, Woo-Sung;Yook, Jong-Gwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.38-38
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    • 2008
  • 무선 통신에 사용되는 기판에서 passive device는 대부분 기판 위에 개별적으로 표면 실장 되고 있으며 전체 기판면적에 80% 정도를 차지하고 있다. 따라서 기판의 소형화, 경량화를 위하여 많은 면적을 차지하는 수동소자들을 다층인쇄회로기판(multi-layer circuit board)에 내장하는 내장형 수동소자(embedded passive device) 기술이 연구되고 있다. 본 연구원에서 개발한 복합재료는 무기물 충전제 $SrTiO_3$를 사용하였으며, 열가소성 수지로는 cyclo-olefin-polymer계열의 수지를 바탕으로 제작 하였고, 유전율7~7.5이고 유전손실은 0.0045이다. 또한 $SrTiO_3$/유기물 복합재료는 공정온도가 낮고 경제적인 유기물에 높은 유전상수를 갖는 무기물이 분산되어 있는 형태이며, 우수한 유전 특성, 화학적 안정성, 저온 제조공정, 제조단가의 감소, 패키징 크기의 감소 등의 장점을 갖는다. 개발된 재료를 기반으로 Multi-layer 구조를 이용한 다양한 용량대의 capacitor를 구현 하였으며, spiral inductor 와 내장형 spiral inductor를 구현하여 다양한 용량대의 inductor를 구현 하였다. 그리고 각각의 구조에 따른 inductance와 Q factor를 분석 하였으며, Q factor가 100이상인 high Q inductor도 구현하였다. 이렇게 구현된 내장형 수동소자는 기판의 크기의 감소와 제조 단가의 절감, 최소 크기의 기판을 구현하는데 응용이 가능 할 것으로 예상 된다.

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Modeling of High-speed 3-Disional Embedded Inductors (고속 3차원 매립 인덕터에 대한 모델링)

  • 이서구;최종성;윤일구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.139-142
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    • 2001
  • As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

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Modeling of 3-D Embedded Inductors Fabricated in LTCC Process (저온 동시소성 공정으로 제작된 3차원 매립 인덕터 모델링)

  • 이서구;최종성;윤일구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.4
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    • pp.344-348
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    • 2002
  • As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

Embedded switched-capacitor quasi-Z-source inverter topology (내장형 스위치드 커패시터 Quasi-Z-소스 인버터)

  • Lee, J.W.;Hyun, J.S.;Chun, T.W.;Lee, H.H.;Kim, H.G.
    • Proceedings of the KIPE Conference
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    • 2016.11a
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    • pp.220-221
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    • 2016
  • This paper proposes an active switched-capacitor embedded quasi-Z-source inverter (ASC-EqZSI) topology. In order to improve boost ability, One diode and one switch device are added in the qZSI impedance network, and a single dc source is shifted in series with the inductor in the impedance network. The performances of the proposed topology are verified with simulation and experimental results.

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Three Phase Embedded Z-Source Inverter (3상 임베디드 Z-소스 인버터)

  • Oh, Seung-Yeol;Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.6
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    • pp.486-494
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    • 2012
  • In this paper, we proposes the three-phase embedded Z-source inverter consisting of the three embedded Z-source converters and it's the output voltage control method. Each embedded Z-source converter can produce the bipolar output capacitor voltages according to duty ratio D such as single-phase PWM inverter. The output AC voltage of the proposed system is obtained as the difference in the output capacitor voltages of each converter, and the L-C output filter is not required. Because the output AC voltage can be stepped up and down, the boost DC converter in the conventional two-stage inverter is unnecessary. To confirm the validity of the proposed system, PSIM simulation and a DSP based experiment were performed under the condition of the input DC voltage 38V, load $100{\Omega}$, and switching frequency 30kHz. Each converter is connected by Y-connection for three-phase loads. In case that the output phase voltage is the same $38V_{peak}$ as the input DC voltage and is the 1.5 times($57V_{peak}$), the simulation and experimental results ; capacitor voltages, output phase voltages, output line voltages, inductor currents, and switch voltages were verified and discussed.