• Journal of the Korean Vacuum Society
• /
• v.21 no.1
• /
• pp.36-40
• /
• 2012

We have developed the detection method of the resonance frequency of micro/nano mechanical resonator using optical method. The optical interferometery method enabled us to detect the displacement change of resonators within several nm scale. The micro mechanical resonator was produced by attaching a micro mechanical cantilever to a piezo ceramic. The mass of cantilever was increased by evaporating Au using electron beam evaporator and the mass variation was estimated by detecting the resonance frequency changes.

• Proceedings of the Korean Vacuum Society Conference
• /
• 1999.07a
• /
• pp.126-126
• /
• 1999

본 실험의 목적은 FED의 상부, 하부 전극으로 사용되는 Mo를 건식, 습식 식각함으로써 DED 소자의 공정을 개발하는 것이다. Mo는 $261^{\circ}C$의 높은 융점을 지니고 있으며, 우수한 열적 안정성과 비교적 낮은 비저항을 가지는 재료로써 FED와 같은 전계 방출 소자의 cathod 팁 및 전극물질로 사용되어지는 가장 보편적인 물질이다. FED와 같은 전계방출소자가 갖추어야 할 요건은 전자 방출 영역이 소자 동작시 변형되지 않아야 하고, 기계적 ,화학적, 열적 내구성이 좋아야 함인데 이러한 요건을 충족시킬 수 있고 가장 범용적으로 사용되는 물질이 Mo이다. 실험에서 사용된 Mo는 DC magnetron sputter를 사용하여 Ar 가스를 첨가하여 5mTorr하에서 Si 기판위에 증착속도를 300$\AA$/min로 하여 1.6$\mu\textrm{m}$ 증착하였다. 본 실험의 Mo 식각은 고밀도 플라즈마원인 ICP를 이용하였다. 식각특성은 식각 가스조합, inductive power, bias voltage, 공정 압력의 다양한 공정 변수에 따른 식각특성 변화를 관찰하였다. 식각시 chlorine 가스를 주요 식각 가스로 사용하고 BCl3, O2, Ar을 첨가가스로 사용하였으며, inductive power는 300-600, bias voltage는 120-200V 사용하였고 압력은 15-30mTorr, 기판온도는 7$0^{\circ}C$로 유지하였으며 식각마스크로는 electron-beam evaporator로 1$\mu\textrm{m}$ 증착한 SiO2를 patterning하여 사용하였다. 식각속도는 stylus profiler를 이용하여 측정하였으며 식각후 profile은 scanning electron microscopy (SEM)을 통하여 관찰하였다. 실험 결과 순수한 Cl2 BCl3 가스만을 사용한 경우 보다는 Cl2 가스에 O2를 첨가하였을 때 좋은 선택비를 얻었다. 또한, inductive power와 bias voltage, Mo의 식각속도의 적절한 조절을 통해 SiO2에 대한 선택도를 변화시킬 수 있었다. Cl2:O2비를 1:1로 하고 400W/-150V, 20mTorr의 압력, 7$0^{\circ}C$ 기판온도에서 식각시 200$\AA$/min의 Mo 식각속도, SiO2와의 선택비 8:1을 얻을 수 있었다. 또한 실제 FED 소자 구조형성에 적용한 결과 비등방적인 식각형상을 형성할 수 있었다.

• Journal of the Korean Vacuum Society
• /
• v.20 no.5
• /
• pp.339-344
• /
• 2011

The Ohmic contact of Ti/Au metals on n-type ZnO thin film deposited on c-plane sapphire substrates by pulsed laser deposition was investigated by TLM (transfer length method) patterns. The Ti/Au metal films with thickness of 35 nm and 90 nm were deposited by electron-beam evaporator and thermal evaporator, respectively. By using the photo-lithography method, the $100{\times}100{\mu}m^2$ TLM patterns with $6{\sim}61{\mu}m$ gaps were formed. To improve the electrical properties as well as to decrease an interface states and stress between metal and semiconductor, the post-annelaing process was done in oxygen ambient by rapid thermal annealing system at temperature of $100{\sim}500^{\circ}C$ for 1 min. In this study, it appeared that the minimum specific contact resistivity shows about $1.1{\times}10^{-4}{\Omega}{\cdot}cm^2$ in $300^{\circ}C$ annealed sample, which may be originated from formation of oxygen vacancies of ZnO during an oxidation of Ti metal at the interface of Ohmic contacts.

• Proceedings of the KIEE Conference
• /
• 1999.07d
• /
• pp.1559-1562
• /
• 1999

We formed $SiO_2:F$ films by low-temperature process called Liquid Phase Deposition(LPD) and investigated its electrical and physical properties. Because of the use of room-temperature and no special vacuum apparatus for forming $SiO_2:F$ films, this technique can have some advantages related with the application to dielectric interlayer for multilevel structure in ULSI devices. The growth rate 100nm/hr was obtained at the growth solution of 2.5mol/l. The P-etch rate showed a similar or better tendency compared with $SiO_2$ films formed by CVD, Sputter, E-beam evaporator etc.. The fourier transform infrared (FTIR) spectra revealed that the contained fluorine atoms exist uniform throughout the formed $SiO_2$ films. The Scanning Electron Microscope images showed that LPD-$SiO_2$ films could be stably grown on silicon substrates and the good step-coverage could also be obtained, which indicates that the LPD-$SiO_2$ films have some possibility of the application to planarization and interlayer dielectric films which are vitally necessary to achieve the multilevel interconnection in ULSI. The I-V characteristics has some distinct differences according to the concentration of growth solution.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.359-359
• /
• 2014

In this study, surface plasmon resonance structures for the selective and the enhanced transmission of infrared light were designed. In order to relieve the large discontinuity of refractive index between air and metal hole array, $Si_3N_4$ was used as the impedance matching layer. Experimental parameter were calculated and determined in advance by the rigorous coupled wave analysis (RCWA) simulation, and then the experiment was carried out. A 2-dimensional metal hole array structures were patterned on the size of $1{\times}1cm^2$ GaAs substrate using photolithography process, and 5 nm thick Ti, 50 nm thick Au were deposited by E-beam evaporator, respectively. Subsequently, $Si_3N_4$ films with various thicknesses (150, 350, 550, and 750 nm) were deposited by plasma enhanced chemical vapor deposition (PECVD). For the comparison, transmittance of specimens with and without $Si_3N_4$ was measured using Fourier transform infrared spectroscopy (FTIR) in the range of $2.5-15{\mu}m$. Furthermore, the surface and the cross-sectional images were collected from the specimens by scanning electron microscopy (SEM). From the results, it was demonstrated that the transmittance was enhanced up to 80% by the deposition of 750 nm $Si_3N_4$ at $6.23{\mu}m$. It has advantage of enhanced transmission despite the simple fabrication process.

• Current Photovoltaic Research
• /
• v.1 no.1
• /
• pp.63-68
• /
• 2013

We investigated the effects of Au eutectic reaction on Si thin film growth by hot wire chemical vapor deposition. Small SiC and Si nano-particles fabricated through a wet etching process were coated and biased at 50 V on micro-textured Si p-n junction solar cells. Au thin film of 10 nm and a Si thin film of 100 nm were then deposited by an electron beam evaporator and hot wire chemical vapor deposition, respectively. The Si and SiC nano-particles and the Au thin film were structurally embedded in Si thin films. However, the Au thin film grew and eventually protruded from the Si thin film in the form of Au silicide nano-balls. This is attributed to the low eutectic bonding temperature ($363^{\circ}C$) of Au with Si, and the process was performed with a substrate that was pre-heated at a temperature of $450^{\circ}C$ during HWCVD. The nano-balls and structures showed various formations depending on the deposited metals and Si surface. Furthermore, the samples of Au nano-balls showed low reflectance due to surface plasmon and quantum confinement effects in a spectra range of short wavelength spectra range.

• Journal of Information Display
• /
• v.7 no.3
• /
• pp.13-18
• /
• 2006

Currently, the flexible organic light emitting devices (OLEDs) are investigated. They are very vulnerable to moisture, and thus have been found to show some problems. Thus, an effective barrier layer is needed to protect from moisture in air. We deposited thin films with magnesium oxide (MgO) and silicon oxide $(SiO_{2})$ compounds mixed at various mixture ratios on flexible polyether sulfone (PES) substrates by an electron-beam evaporator to investigate their applizability for transparent barrier applications. In this study, we found that as the MgO fraction increased, thin films comprised of MgO and $(SiO_{2})$ compounds became more amorphous and their surface morphologies become smoother and denser. In addition, zirconium oxide $(ZrO_{2})$ was added to the above-mentioned compound mixtures. $ZrO_{2}$ made thin mixture films more amorphous and made the surface morphology denser and more uniform. The water vapor transmission rates (WVTRs) of the whole films decreased rapidly. The best WVTR was obtained by depositing thin films of Mg-Si-Zr-O compound among the whole thin films. As the thin mixture films became more amorphous, and the surface morphology become denser and more uniform, the WVTRs decreased. Therefore, the thin mixture films became more suitable for flexible OLED applications as transparent passivation layers against moisture in air.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2005.07a
• /
• pp.379-380
• /
• 2005

Single phase $CuInS_2$ thin film with a highest diffraction peak (112) at a diffraction angle ($2\Theta$) of $27.7^{\circ}$ was well made by SEL method at annealing temperature of $250^{\circ}C$ and annealing hour of 60 min in vacuum of $10^{-3}$ Torr or in S ambience for an hour. And the peak of diffraction intensity at miller index (112) of $CuInS_2$ thin film annealed in S ambience was shown a little higher about 11 % than in only vacuum. Single phase $CuInS_2$ thin films were appeared from 0.85 to 1.26 of Cu/In composition ratio and sulfur composition ratios of $CuInS_2$ thin films fabricated in S ambience were all over 50 atom%. Also when $CuInS_2$ composition ratio was 1.03, $CuInS_2$ thin film with chalcopyrite structure had the highest XRD peak (112). The largest lattice constant of a and grain size of $CuInS_2$ thin film in S ambience was 5.63 ${\AA}$ and 1.2 ${\mu}m$ respectively. And the films in S ambience were all p-conduction type with resistivities of around $10^{-1}{\Omega}cm$.

• Korean Journal of Metals and Materials
• /
• v.48 no.2
• /
• pp.133-140
• /
• 2010

10 nm thick Ni layers were deposited on 200 nm $SiO_2/Si$ substrates using an e-beam evaporator. Then, 60 nm or 20 nm thick ${\alpha}$-Si:H layers were grown at low temperature (<$200^{\circ}C$) by a Catalytic-CVD. NiSi layers were already formed instantaneously during Cat-CVD process regardless of the thickness of the $\alpha$-Si. The resulting changes in sheet resistance, microstructure, phase, chemical composition, and surface roughness with the additional rapid thermal annealing up to $500^{\circ}C$ were examined using a four point probe, HRXRD, FE-SEM, TEM, AES, and SPM, respectively. The sheet resistance of the NiSi layer was 12${\Omega}$/□ regardless of the thickness of the ${\alpha}$-Si and kept stable even after the additional annealing process. The thickness of the NiSi layer was 30 nm with excellent uniformity and the surface roughness was maintained under 2 nm after the annealing. Accordingly, our result implies that the low temperature Cat-CVD process with proposed films stack sequence may have more advantages than the conventional CVD process for nano scale NiSi applications.

• Journal of the Korean Vacuum Society
• /
• v.17 no.6
• /
• pp.528-537
• /
• 2008

60 nm and 20 nm thick hydrogenated amorphous silicon(a-Si:H) layers were deposited on 200 nm $SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by an e-beam evaporator. Finally, 30 nm-Ni/(60 nm and 20 nm) a-Si:H/200 nm-$SiO_2$/single-Si structures were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 40 sec. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy(FE-SEM), transmission electron microscopy(TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide from the 60 nm a-Si:H substrate showed low sheet resistance from $400^{\circ}C$ which is compatible for low temperature processing. The nickel silicide from 20 nm a-Si:H substrate showed low resistance from $300^{\circ}C$. Through HRXRD analysis, the phase transformation occurred with silicidation temperature without a-Si:H layer thickness dependence. With the result of FE-SEM and TEM, the nickel silicides from 60 nm a-Si:H substrate showed the microstructure of 60 nm-thick silicide layers with the residual silicon regime, while the ones from 20 nm a-Si:H formed 20 nm-thick uniform silicide layers. In case of SPM, the RMS value of nickel silicide layers increased as the silicidation temperature increased. Especially, the nickel silicide from 20 nm a-Si:H substrate showed the lowest RMS value of 0.75 at $300^{\circ}C$.