• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.5
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• pp.2044-2062
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• 2018

Information theory progression along with the advancements being made in the field of Vehicular Ad hoc NETworks (VANETs) supports the use of coding-aware opportunistic routing for efficient data forwarding. In this work, we propose and investigate an adaptive coding-aware routing scheme in a specific VANET scenario known as a vehicular platoon. Availability of coding opportunities may vary with time and therefore, the accurate identification of available coding opportunities at a specific time is a quite challenging task in the highly dynamic scenario of VANETs. In the proposed approach, while estimating the topology of the network at any time instance, a forwarding vehicle contemplates the composition of multiple unicast data flows to encode the correct data packets that can be decoded successfully at destinations. The results obtained by using OMNeT++ simulator reveal that higher throughput can be achieved with minimum possible packet transmissions through the proposed adaptive coding-aware routing approach. In addition, the proposed adaptive scheme outperforms static transmissions of the encoded packets in terms of coding gain, transmission percentage, and encoded packet transmission. To the best of our knowledge, the use of coding-aware opportunistic routing has not been exploited extensively in available literature with reference to its implications in VANETs.

• The KIPS Transactions:PartC
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• v.17C no.2
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• pp.189-196
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• 2010

The LEACH does not use flooding method for data transmission and this makes low power consumption. So performance of the WSN is increased. On the other hand, QoS based algorithm which use restricted flooding method in WSN also achieves low power consuming rate by reducing the number of nodes that are participated in routing path selection. But when the data is delivered to the sink node, the LEACH choose a routing path which has a small hop count. And it leads that the performance of the entire network is worse. In the paper we propose a QoS based energy efficient clustering and routing algorithm in WSN. I classify the type of packet with two classes, based on the energy efficiency that is the most important issue in WSN. We provide the differentiated services according to the different type of packet. Simulation results evaluated by the NS-2 show that proposed algorithm extended the network lifetime 2.47 times at average. And each of the case in the class 1 and class 2 data packet, the throughput is improved 312% and 61% each.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.4
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• pp.699-706
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• 2008

H.264/AVC is a new international standard for the compression of video images, in which a deblocking filter has been adopted to remoye blocking artifacts. This paper proposes an efficient architecture of deblocking filter in H.264/AVC. By making good use of data dependence between neighboring $4{\times}4$ blocks, the memory sire is reduced and the throughput of the deblocking filter processing is increased. The designed deblocking filter further enhances the parallelism by simultaneously executing horizontal and vertical filtering within a macroblock in pipeline method and adopting overlap between macroblocks. The implementation result shows that the proposed architecture enhances the performance of deblocking filter processing from 1.75 to 4.23 times than that of the conventional deblocking filter. Hence the Proposed architecture of deblocking filter is able to perform real-time deblocking in high-resolution($2048{\times}1024$) video applications.

• Journal of the Korea Society of Computer and Information
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• v.15 no.9
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• pp.1-8
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• 2010

The key challenge in HW/SW co-design is how to choose the appropriate HW/SW partitioning from the vast array of possible options in the mapping set. In this paper we present a unique and efficient approach for addressing this problem known as Customized Heuristic Algorithm for Reducing Mapping Sets(CHARMS). CHARMS uses sensitivity to individual task computational complexity as well the computed weighted values of system performance influencing metrics to streamline the mapping sets and extract the most optimal cases. Using H.263 encoder, we show that CHARMS sieves out 95.17% of the sub-optimal mapping sets, leaving the designer with 4.83% of the best cases to select from for run-time implementation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.401-404
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• 2016

This paper proposes entropy coding method of HEVC CABAC Encoder for efficient hardware architecture. The Binary Arithmetic Encoder requires data dependency at each step, which is difficult to be operated in a fast. Proposed Binary Arithmetic Encoder is designed 4 stage pipeline to quickly process the input value bin. According to bin approach, either MPS or LPS is selected and the binary arithmetic encoding is performed. Critical path caused by repeated operation is reduced by using the LUT and designed as a shift operation which decreases hardware size and not using memory. The proposed Binary Arithmetic Encoder of CABAC is designed using Verilog-HDL and it was implemented in 65nm technology. Its gate count is 3.17k and operating speed is 1.53GHz.

• KIPS Transactions on Computer and Communication Systems
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• v.8 no.5
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• pp.111-118
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• 2019

Recent graphic processing units (GPUs) provide high throughput by using powerful hardware resources. However, massive memory accesses cause GPU performance degradation due to cache inefficiency. Therefore, the performance of GPU can be improved by reducing thread parallelism when cache suffers memory contention. In this paper, we propose a dynamic warp scheduler which controls thread parallelism according to degree of cache contention. Usually, the greedy then oldest (GTO) policy for issuing warp shows lower parallelism than loose round robin (LRR) policy. Therefore, the proposed warp scheduler employs the LRR warp scheduling policy when Miss Status Holding Register(MSHR) utilization is low. On the other hand, the GTO policy is employed in order to reduce thread parallelism when MSHRs utilization is high. Our proposed technique shows better performance compared with LRR and GTO policy since it selects efficient scheduling policy dynamically. According to our experimental results, our proposed technique provides IPC improvement by 12.8% and 3.5% over LRR and GTO on average, respectively.

• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.5
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• pp.799-806
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• 2021

In the IoT environment, event data from sensors is continuously reported over time. Event data obtained in this trend is accumulated indefinitely, so a method for efficient analysis and management of data is required. In this study, a data stream segmentation method was proposed to support the effective selection and utilization of event data from sensors that are continuously reported and received. An identifier for identifying the point at which to start the analysis process was selected. By introducing the role of these identifiers, it is possible to clarify what is being analyzed and to reduce data throughput. The identifier for stream segmentation proposed in this study is a semantic-oriented data stream segmentation method based on the event occurrence of each stream. The existence of identifiers in stream processing can be said to be useful in terms of providing efficiency and reducing its costs in a large-volume continuous data inflow environment.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.4
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• pp.123-134
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• 2004

In this paper a high speed architecture of the RC4 stream cipher is proposed and its FPGA implementation is presented. Compared to the conventional RC4 designs which have long initialization operation or use double or triple S-arrays to reduce latency delay due to S-array initialization phase, the proposed architecture for RC4 stream cipher eliminates the S-array initialization operation using 256-bit valid entry scheme and supports 40/128-bit key lengths with efficient modular arithmetic hardware. The proposed RC4 stream cipher is implemented using Xilinx XCV1000E-6H240C FPGA device. The designed RC4 stream cipher has about a throughput of 106 Mbits/sec at 40 MHz clock and thus can be applicable to WEP processor and RC4 key search processor.

• The Plant Pathology Journal
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• v.37 no.2
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• pp.200-203
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• 2021

Rice blast caused by the filamentous fungus Magnaporthe oryzae, is arguably the most devastating rice disease worldwide. Development of a high-throughput and reliable field blast resistance evaluation system is essential for resistant germplasm screening, resistance genes identification and resistant varieties breeding. However, the occurrence of rice blast in paddy field is easily affected by various factors, particularly lack of sufficient inoculum, which always leads to the non-uniform occurrence and reduced disease severity. Here, we described a procedure for adequately inducing the occurrence of rice seedling blast in paddy field, which involves pretreatment of diseased straw, initiation of seedling blast for the first batch of spreader population, inducing the occurrence of the second batch of spreader population and test materials. This procedure enables uniform and consistent infection, which facilitates efficient and accurate assessment of seedling blast resistance for diverse rice materials.

• Journal of Korea Port Economic Association
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• v.38 no.2
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• pp.123-138
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• 2022

Korea has been huge investments in its port system, annually upgrading its infrastructure to turn the ports into Asian hub port. However, while Busan port is ranked fifth globally for container throughput, Other Korean ports are ranked much lower. This article applies Data Envelopment Analysis (DEA) and Malmquist Productivity Index (MPI) to evaluate selected major Korean seaports' operational efficiency and productivity from 2010 to 2018. It further integrates Principal Component Analysis (PCA) into DEA, with the PCA-DEA combined model strengthening the basic DEA results, as the discriminatory power weakens when the variable number exceeds the number of Decision Making Units(DMU). Meanwhile, MPI is applied to measure the seaports' productivity over the years. The analyses generate efficiency and productivity rankings for Korean seaports. The results show that except for Gwangyang and Ulsan port, none of the selected seaports is currently efficient enough in their operations. The study also indicates that technological progress has led to impactful changes in the productivity of Korean seaports.