• The KIPS Transactions:PartC
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• v.19C no.2
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• pp.135-144
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• 2012

All the servers in a traditional server cluster environment are kept On. If the request load reaches to the maximum, we exploit its maximum possible performance, otherwise, we exploit only some portion of maximum possible performance so that the efficiency of server power consumption becomes low. We can improve the efficiency of power consumption by controlling power mode of servers according to load situation, that is, by making On only minimum number of servers needed to handle current load while making Off the remaining servers. In the existing power mode control method, they used a static policy to decide server power mode at a fixed time interval so that it cannot adapt well to the dynamically changing load situation. In order to improve the existing method, we propose a dynamic server power control algorithm. In the proposed method, we keep the history of server power consumption and, based on it, predict whether power consumption increases in the near future. Based on this prediction, we dynamically change the time interval to decide server power mode. We performed experiments with a cluster of 30 PCs. Experimental results show that our proposed method keeps the same performance while reducing 29% of power consumption compared to the existing method. In addition, our proposed method allows to increase the average CPU utilization by 66%.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.30 no.7
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• pp.62-67
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• 2012

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.1
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• pp.40-48
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• 2019

Hybrid electric propulsion systems (H-EPSs) are an intermediate step for integrated full electric propulsion warships. H-EPSs are a dynamic combination of mechanical and electrical propulsion systems to achieve the required mission performances. The system modes could adapt to meet the requirement of the various operation conditions of a warship. This paper presents a configuration and operating modes of H-EPSs considering the operation conditions of a destroyer class warship. The system has three propulsion modes, namely, motoring mode, generating mode [power take off (PTO) mode], and mechanical mode. The PTO mode requires a careful fuel efficiency analysis because the fuel consumption rate of propulsion engines may be low compared with the generator's engines depending on the loading power. Therefore, the calculation of fuel consumption according to the operating modes is performed in this study. Although the economics of the PTO mode depends on system cases, it has an advantage in that it ensures the reliability of electric power in case of blackout or minimum generator operation.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.7
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• pp.1274-1292
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• 2011

Due to the variety of household electric devices and different power consumption habits of consumers at present, general home energy management (HEM) systems suffer from the lack of dynamic identification of various household appliances and a unidirectional information display. This study presented a set of intelligent interconnection network systems for electric appliances, which can measure the power consumption of household appliances through a current sensing device based on OSGi platform. The system establishes the characteristics and categories of related electric appliances, and searches the corresponding cluster data and eliminates noise for recognition functionality and error detection mechanism of electric appliances by applying the clustering algorithm. The system also integrates household appliance control network services so as to control them according to users' power consumption plans or through mobile devices, thus realizing a bidirectional monitoring service. When the system detects an abnormal operating state, it can automatically shut off electric appliances to avoid accidents. In practical tests, the system reached a recognition rate of 95%, and could successfully control general household appliances through the ZigBee network.

• Journal of Sensor Science and Technology
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• v.27 no.6
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• pp.362-367
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• 2018

A complementary metal oxide semiconductor (CMOS) binary image sensor is proposed for low-power and low-noise operation. The proposed binary image sensor has the advantages of reduced power consumption and fixed pattern noise (FPN). A gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector is used as the proposed CMOS binary image sensor. The GBT PMOSFET-type photodetector has a floating gate that amplifies the photocurrent generated by incident light. Therefore, the sensitivity of the GBT PMOSFET-type photodetector is higher than that of other photodetectors. The proposed CMOS binary image sensor consists of a pixel array with $394(H){\times}250(V)$ pixels, scanners, bias circuits, and column parallel readout circuits for binary image processing. The proposed CMOS binary image sensor was analyzed by simulation. Using the dynamic comparator, a power consumption reduction of approximately 99.7% was achieved, and this performance was verified by the simulation by comparing the results with those of a two-stage comparator. Also, it was confirmed using simulation that the FPN of the proposed CMOS binary image sensor was successfully reduced by use of the double sampling process.

• KIPS Transactions on Computer and Communication Systems
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• v.4 no.11
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• pp.369-382
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• 2015

Energy aware server clusters aim to reduce power consumption at maximum while keeping QoS(quality of service) compared to energy non-aware server clusters. They adjust the power mode of each server in a fixed or variable time interval to activate only the minimum number of servers needed to handle current user requests. Previous studies on energy aware server cluster put efforts to reduce power consumption or heat dissipation, but they do not consider energy efficiency well. In this paper, we propose an energy efficient cluster management method to improve not only performance per watt but also QoS of the existing server power mode control method based on autonomous learning. Our proposed method is to adjust server power mode based on a hybrid approach of autonomous learning method with multi level thresholds and power consumption prediction method. Autonomous learning method with multi level thresholds is applied under normal load situation whereas power consumption prediction method is applied under abnormal load situation. The decision on whether current load is normal or abnormal depends on the ratio of the number of current user requests over the average number of user requests during recent past few minutes. Also, a dynamic shutdown method is additionally applied to shorten the time delay to make servers off. We performed experiments with a cluster of 16 servers using three different kinds of load patterns. The multi-threshold based learning method with prediction and dynamic shutdown shows the best result in terms of normalized QoS and performance per watt (valid responses). For banking load pattern, real load pattern, and virtual load pattern, the numbers of good response per watt in the proposed method increase by 1.66%, 2.9% and 3.84%, respectively, whereas QoS in the proposed method increase by 0.45%, 1.33% and 8.82%, respectively, compared to those in the existing autonomous learning method with single level threshold.

• Journal of Communications and Networks
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• v.7 no.2
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• pp.126-134
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• 2005

Reducing energy consumption in mobile hosts (MHs) is one of the most critical issues in wireles/mobile networks. IP paging protocol at network layer and power saving mechanism (PSM) at link layer are two core technologies to reduce the energy consumption of MHs. First, we investigate the energy efficiency of the current IEEE 802.11 power saving mechanism (PSM) when IP paging protocol is deployed over IEEE 802.11 networks. The result reveal that the current IEEE 802.11 PSM with a fixed wakeup interval (i.e., the static PSM) exhibits a degraded performance when it is integrated with IP paging protocol. Therefore, we propose an adaptive power saving mechanism in IEEE 802.11-based wireless IP networks. Unlike the static PSM, the adaptive PSM adjusts the wake-up interval adaptively depending on the session activity at IP layer. Specifically, the MH estimates the idle periods for incoming sessions based on the exponentially weighted moving average (EWMA) scheme and sets its wake-up interval dynamically by considering the estimated idle period and paging delay bound. For performance evaluation, we have conducted comprehensive simulations and compared the total cost and energy consumption, which are incurred in IP paging protocol in conjunction with various power saving mechanisms: The static PSM, the adaptive PSM, and the optimum PSM. Simulation results show that the adaptive PSM provides a closer performance to the optimum PSM than the static PSM.

• Transactions on Semiconductor Engineering
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• v.1 no.1
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• pp.14-22
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• 2023

This paper presents a low-power flip-flop(FF) circuit that minimizes the transition of internal nodes by using a dual change-sensing method. The proposed dual change-sensing FF(DCSFF) shows the lowest dynamic power consumption among conventional FFs, when there is no input data transition. From the measured results with 65nm CMOS process, the power consumption has been reduced by 98% and 32%, when the data activity is 0% and 100%, respectively, compared to conventional transmission gate FF(TGFF). Further, compared to change-sensing FF(CSFF), the power consumption of proposed DCSFF is smaller by 30%.

• Journal of Information Processing Systems
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• v.7 no.1
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• pp.93-102
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• 2011

In deeply scaled CMOS technologies, two major non-ideal factors are threatening the survival of the CMOS; i) PVT (process, voltage, and temperature) variations and ii) leakage power consumption. In this paper, we propose a novel post-silicon tuning methodology to scale optimum voltage and frequency "dynamically". The proposed design technique will use our PVT sensor circuits to monitor the variations and based on the monitored variation data, voltage and frequency will be compensated "automatically". During the compensation process, supply voltage is dynamically adjusted to guarantee the minimum total power consumption without violating the frequency requirement. The simulation results show that the proposed technique can reduce the total power by 85% and the static power by 53% on average for the selected ISCAS'85 benchmark circuits with 45 nm CMOS technology compared to the results of the traditional PVT compensation method.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.212-221
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• 1996

A CMOS comparator is designed for low voltage and low power operations. The proposed comparator consists of a preadmplifier followed by a regenerative latch. The preasmplifier reduces the power consumption to a half with the power-down mode and the dynamic offsets of the latch, which is affected by each device mismatch, is statistically analyzed. The circuit is designed and simulated using a 0.8.mu.m n-well CMOS process and the dissipated power is 0.16mW at a 20MHz clock speed based on a 3V supply.