• 제목/요약/키워드: dual frequency operation

검색결과 161건 처리시간 0.023초

이중공진 소형 칩 Meander 안테나에 관한 연구 (A Study on the Small Chip Meander Antenna for Dual-frequency Operation)

  • 김현준;권세웅;심성훈;강종윤;윤석진;김현재;윤영중
    • 한국전자파학회논문지
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    • 제13권7호
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    • pp.633-640
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    • 2002
  • 본 논문에서는 이중공진 칩 meander 안테나를 제안하였다. 제안된 안테나는 기존 meander 안테나의 소형화 특성을 유지하면서 인접한 주파수에서 이중공진하는 특징을 갖는다. LTCC-MLC 공정을 이용하여 제작하였고, 2.20 GHz와 2.883 GHz에서 이중공진(주파수비=1.35)하며, meander 패치의 크기는 15.7 mm $\times$ 6.52 mm( 0.32 λg $\times$ 0.133 λg)이다. 그리고 이중공진 meander 안테나의 추가적인 소형화를 위해 3차원 구조를 제안한다. 이 3차원 구조를 이용하여 약 50 %의 크기를 추가적으로 소형화하였다. 전류분포를 통해 제안된 안테나가 이중공진하는 원리를 확인하였고, 제작된 안테나의 반사손실 및 방사패턴의 특성을 분석하였다.

DUAL DUTY CYCLE CONTROLLED SOFT-SWITCHING HIGH FREQUENCY INVERTER USING AUXILIARY REVERSE BLOCKING SWITCHED RESONANT CAPACITOR

  • Bishwajit, Saha;Suh, Ki-Young;Lee, Hyun-Woo;Mutsuo, Nakaoka
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.129-131
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    • 2006
  • This paper presents a new ZVS-PWM high frequency inverter. The ZVS operation is achieved in the whole load range by using a simple auxiliary reverse blocking switch in parallel with series resonant capacitor. The operating principle and the operating characteristics of the new high frequency circuit treated here are illustrated and evaluated on the basis of simulation results. It was examined that the complete soft switching operation can be achieved even for low power setting ranges by introducing the high frequency dual duty cycle control scheme. In the proposed high frequency inverter treated here, the dual mode pulse modulation control strategy of the asymmetrical PWM in the higher power setting ranges and the lower power setting ones, the output power of this high frequency inverter could introduce in order to extend soft switching operation ranges. Dual duty cycle is used to provide a wide range of output power regulation that is important in many high frequency inverter applications. It is more suitable for induction heating applications the operation and control principle of the proposed high frequency inverter are described and verified through simulated results.

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Selective Dual Duty Cycle Controlled High Frequency Inverter Using a Resonant Capacitor in Parallel with an Auxiliary Reverse Blocking Switch

  • Saha, Bishwajit;Suh, Ki-Young;Kwon, Soon-Kurl;Mishima, Tomokazu;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • 제7권2호
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    • pp.118-123
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    • 2007
  • This paper presents a new ZCS-PWM high frequency inverter. Zero current switching operation is achieved in the whole load range by using a simple auxiliary reverse blocking switch in parallel with series resonant capacitor. Dual duty cycle control scheme is used to provide a wide range of high frequency AC output power regulation that is important in many high frequency inverter applications. It found that a complete soft switching operation can be achieved even for low power setting ranges by introducing high-frequency dual duty cycle control scheme. The proposed high frequency inverter is more suitable for consumer induction heating(IH) applications. The operation and control principle of the proposed high frequency inverter are described and verified through simulated results.

A Switchable Microstrip Patch Antenna for Dual Frequency Operation

  • Sung, Young-Je
    • ETRI Journal
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    • 제30권4호
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    • pp.603-605
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    • 2008
  • A novel design for equilateral-triangular microstrip antennas with switchable resonant frequency is proposed. For dual-frequency operation, the proposed design is achieved by loading a pair of slits in the triangular patch, and two PIN diodes are utilized to switch the slits on or off. By increasing the length of the slits, the lower resonant frequency can be varied in the range from 1.22 GHz to 1.72 GHz whereas the upper resonant frequency remains unchanged.

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Design of Miniaturized Dual-Band Artificial Magnetic Conductor with Easy Control of Second/First Resonant Frequency Ratio

  • Ta, Son Xuat;Park, Ikmo
    • Journal of electromagnetic engineering and science
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    • 제13권2호
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    • pp.104-112
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    • 2013
  • A novel miniaturized artificial magnetic conductor (AMC) is proposed for dual-band operation. An AMC unit cell that employs four slots in the metallic patch is used to achieve miniaturization as well as easy control of the second/first resonant frequency ratio, which can be varied from 1.5 to 3.26 by simply changing the slot shape for a given metallic patch size. A dual-band antenna composed of a wideband monopole suspended over the proposed AMC surface is designed and tested to validate this approach. The measurements result in a satisfactory and good matching condition for the dual-band antenna.

두 개의 Frequency Detector를 가지고 있는 Charge Pump PLL 의 최적설계에 관한 연구 (A Study on the Optimum Design of Charge Pump PLL with Dual Phase Frequency Detectors)

  • 우영신;장영민;성만영
    • 대한전기학회논문지:시스템및제어부문D
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    • 제50권10호
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    • pp.479-485
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    • 2001
  • In this paper, we introduce a charge pump phase-locked loop (PLL) architecture which employs a precharge phase frequency detector (PFD) and a sequential PFD to achieve a high frequency operation and a fast acquisition. Operation frequency is increased by using the precharge PFD when the phase difference is within $-{\pi}{\sim}{\pi}$ and acquisition time is shortened by using the sequential PFD and the increased charge pump current when the phase difference is larger than ${\pm}{\pi}$. So error detection range of the proposed PLL structure is not limited to $-{\pi}{\sim}{\pi}$ and a high frequency operation and a higher speed lock-up time can be achieved. The proposed PLL was designed using 1.5 ${\mu}m$ CMOS technology with 5V supply voltage to verify the lock in process. The proposed PLL shows successful acquisition for 200 MHz input frequency. On the other hand, the conventional PLL with the sequential PFD cannot operate at up to 160MHz. Moreover, the lock-up time is drastically reduced from 7.0 ${\mu}s\;to\;2.0\;{\mu}s$ only if the loop bandwidth to input frequency ratio is regulated by the divide-by-4 counter during the acquisition process. By virtue of this dual PFDs, the proposed PLL structure can improve the trade-off between acquisition behavior and locked behavior.

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PLL 주파수 합성기를 위한 dual-modulus 프리스케일러와 차동 전압제어발진기 설계 (Design of CMOS Dual-Modulus Prescaler and Differential Voltage-Controlled Oscillator for PLL Frequency Synthesizer)

  • 강형원;김도균;최영완
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2006년도 하계학술대회
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    • pp.179-182
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    • 2006
  • This paper introduce a different-type voltage-controlled oscillator (VCO) for PLL frequency synthesizer, And also the architecture of a high speed low-power-consumption CMOS dual-modulus frequency divider is presented. It provides a new approach to high speed operation and low power consumption. The proposed circuits simulate in 0.35 um CMOS standard technology.

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이중대역 동작을 위한 멀티모드 시나리오에서 CDMA/TDD의 성능 (Performance of CDMA/TDD in Multimode Scenario for Dual-band Operation)

  • 오형주;황승훈
    • 대한전자공학회논문지TC
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    • 제45권11호
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    • pp.32-36
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    • 2008
  • 본 논문에서는 외부지역에서 낮은 주파수 대역으로 FDD(Frequency Division Duplex)를 사용하고 내부지역에서 TDD(Time Division Duplex)를 사용하는 이중대역 동작을 하는 멀티모드 시나리오에서 내부지역의 CDMA/TDD의 용량을 조사하였다. 특히, 셀 반경, 데이터 전송률, 타임 슬롯 할당과 같은 다양한 시스템 파라미터의 영향을 분석하였다.

A Dual-Output Integrated LLC Resonant Controller and LED Driver IC with PLL-Based Automatic Duty Control

  • Kim, HongJin;Kim, SoYoung;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • 제12권6호
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    • pp.886-894
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    • 2012
  • This paper presents a secondary-side, dual-mode feedback LLC resonant controller IC with dynamic PWM dimming for LED backlight units. In order to reduce the cost, master and slave outputs can be generated simultaneously with a single LLC resonant core based on dual-mode feedback topologies. Pulse Frequency Modulation (PFM) and Pulse Width Modulation (PWM) schemes are used for the master stage and slave stage, respectively. In order to guarantee the correct dual feedback operation, Phased-Locked Loop (PLL)-based automatic duty control circuit is proposed in this paper. The chip is fabricated using $0.35{\mu}m$ Bipolar-CMOS-DMOS (BCD) technology, and the die size is $2.5mm{\times}2.5mm$. The frequency of the gate driver (GDA/GDB) in the clock generator ranges from 50 to 425 kHz. The current consumption of the LLC resonant controller IC is 40 mA for a 100 kHz operation frequency using a 15 V supply. The duty ratio of the slave stage can be controlled from 40% to 60% independent of the frequency of the master stage.

A Design of Dual Frequency Bands Time Synchronization System for Synchronized-Pseudolite Navigation System

  • Seo, Seungwoo;Park, Junpyo;Suk, Jin-Young;Song, Kiwon
    • Journal of Positioning, Navigation, and Timing
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    • 제3권2호
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    • pp.71-81
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    • 2014
  • Time synchronization system using dual frequency bands is designed and the error sources are analyzed for alternative synchronized-pseudolite navigation system (S-PNS) which aims at military application. To resolve near/far problem, dual frequency band operation is proposed instead of pulsing transmission which degrades level of reception. In dual frequency operation H/W delay should be considered to eliminate errors caused by inter-frequency bias (IFB) difference between the receivers of the pseudolites and users. When time synchronization is performed across the sea, multipath error is occurred severely since the elevation angle between pseudolites is low so total reflection can be happened. To investigate the difference of multipath effects according to location, pseudolites are set up coastal area and land area and performances are compared. The error source related with tropospheric delay is becoming dominant source as the coverage of the PNS is broadening. The tropospheric delay is measured by master pseudolite receiver directly using own pseudorange and slave pseudorange. Flight test is performed near coastal area using S-PNS equipped with developed time synchronization system and test results are also presented.