• Journal of the Semiconductor & Display Technology
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• v.21 no.3
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• pp.125-129
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• 2022

The current display technology tends to be highly integrated with high resolution, the element size is gradually downsized, and the structure becomes complicated. Inductively coupled plasma (ICP) dry etcher of various types of etching equipment is a structure that places a large multi-divisional antenna source on the top lid, passes current to the Antenna, and generates plasma using the induced magnetic field generated at this time. However, in the case of a device of a large area size, a support that can withstand a load structurally is necessary, and when these support portions are applied, arrangement of antenna becomes difficult, which causes reduction in uniformity. As described above, the development of antenna source of a large area having a uniform plasma density on the whole surface is difficult to restrict hardware (H/W). As a solution to this problem, we confirmed the change in uniformity of plasma by applying two kinds of specific shape faraday shield(FICP) to the lower part of the large area upper lid antenna of 6 and 8th more than that generation size. In this thesis, we verify the faraday shield effect which can improve plasma uniformity control of ICP dry etcher equipment applied to medium and large displays.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.4
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• pp.203-209
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• 2000

This paper proposes the improvement of the etch rate of GaN using a magnetized inductively coupled $CH_4/H_2/Ar$plasma. The gradient magnetic field with the axial direction is investigated using Gauss-meter and the ion current density is measured using double Langmuir probe. The applied magnetic field changes the ion current density profile in the radial direction, resulting in producing the higher density in the outer region than in the center. GaN dry etching process is carried out based on the measurements of the ion current density. The each rate of 2000 /min is achieved with $CH_4/H_2/Ar$ chemistries at 800 W input power, 250W rf bias power, 10 mTorr pressure and 100 gauss magnetic field.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.695-696
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• 2010

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1045-1048
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• 2003

In this paper, we studied plasma damage of MIS capacitor with $Al_2$O$_3$ dielectric film. Using capacitor pattern with the same area but different perimeters, we tried to separate etching damage mechanism and to optimize the dry etching process. After etching both metal and dielectric layer by the same condition, leakage current and C-V measurements were carried out for Pt/A1$_2$O$_3$/Si structures. The flatband voltage shift was appeared in the C-V plot, and it was caused by the variation of the fixed interface charge and the interface trapped charge. From I-V measurement, it was found the leakage current along the periphery could not be ignored. Finally, we established the process condition of RF power 300W, 100mTorr, Ar/Cl$_2$ gas 60sccm as an optimal etching condition.

• Proceedings of the Materials Research Society of Korea Conference
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• 2007.11a
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• pp.103.2-103.2
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• 2007

• Korean Journal of Materials Research
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• v.16 no.3
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• pp.151-156
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• 2006

A method for fabrication of nano-scale GaN structure by inductively coupled plasma etching is proposed, exploiting a thermal dewetting of Pt thin film as an etch mask. The nano-scale Pt metal islands were formed by the dewetting of 2-dimensional film on $SiO_2$ dielectric materials during rapid thermal annealing process. For the case of 30 nm thick Pt films, pattern formation and dewetting was initiated at temperatures greater $600^{\circ}C$. Controlling the annealing temperature and time as well as the thickness of the Pt metal film affected the size and density of Pt islands. The activation energy for the formation of Pt metal island was calculated to be 23.2 KJ/mole. The islands show good resistance to dry etching by a $CF_4$ based plasma for dielectric etching indicating that the metal islands produced by dewetting are suitable for use as an etch mask in the fabrication of nano-scale structures.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.174-174
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• 2010

In this article, the dry etching mechanism of ZnO thin films in $N_2/Cl_2$/Ar gas chemistry was investigated. The ZnO thin films were deposited on Si substrate using Atomic layer deposition. The etching experiments were performed by inductively coupled plasma system. The maximum etch rate was104.5 nm/min and the highest selectivity of ZnO over $SiO_2$ was 3.3. Etching rate was measured by surface profiler. And the chemical reaction on the surface of the etched ZnO thin films was investigated by x-ray photo electrons pectroscopy. As a result of XPS, $Zn2p_{3/2}$ peak shifted toward a higher binding energy and the O-O and N-O bond were obtained from the sample of ZnO thin film which after plasma treatment.

• Korean Journal of Materials Research
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• v.31 no.3
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• pp.162-171
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• 2021

Dry etching of copper thin films is performed using high density plasma of ethylenediamine (EDA)/hexafluoroisopropanol (HFIP)/Ar gas mixture. The etch rates, etch selectivities and etch profiles of the copper thin films are improved by adding HFIP to EDA/Ar gas. As the EDA/HFIP concentration in EDA/HFIP/Ar increases, the etch rate of copper thin films decreases, whereas the etch profile is improved. In the EDA/HFIP/Ar gas mixture, the optimal ratio of EDA to HFIP is investigated. In addition, the etch parameters including ICP source power, dc-bias voltage, process pressure are varied to examine the etch characteristics. Optical emission spectroscopy results show that among all species, [CH], [CN] and [H] are the main species in the EDA/HFIP/Ar plasma. The X-ray photoelectron spectroscopy results indicate the formation of CuCN compound and C-N-H-containing polymers during the etching process, leading to a good etch profile. Finally, anisotropic etch profiles of the copper thin films patterned with 150 nm scale are obtained in EDA/HFIP/Ar gas mixture.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.1
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• pp.1-6
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• 2004

Dry etch characteristics of polysilicon with HBr/O$_2$ inductively coupled plasma (ICP) have been investigated. We determined etch late, uniformity, etch profiles, and selectivity with analyzing the cross-sectional scanning electron microscopy images obtained from top, center, bottom, right, and left positions. The etch rate of polysilicon was about 2500 $\AA$/min, which meets with the mass production for devices. The wafer level etch uniformity was within $\pm$5 ％. Etch profile showed 90$^{\circ}$ slopes without notches. The selectivity over photoresist was between 2:1∼4.5:1, depending on $O_2$ flow rate. The HBr-ICP etching showed higher PR selectivity, and sharper profile than the conventional Cl$_2$-RIE.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1393-1398
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• 2009

Conventionally, etching is first considered for microelectronics fabrication process and is specially important in process of a-Si:H thin film transistor for LCD. In this paper, we stabilize properties of device by development of wet and dry etching process. The a-Si:H TFTs of this paper is inverted staggered type. The gate electrode is lower part. The gate electrode is formed by patterning with length of 8 ${\mu}$m${\sim}$16 ${\mu}$m and width of 80${\sim}$200 ${\mu}$m after depositing with gate electrode (Cr) 1500 ${\AA}$under coming 7059 glass substrate. We have fabricated a-SiN:H, conductor, etch-stopper and photo resistor on gate electrode in sequence, respectively. The thickness of these thin films is formed with a-SiN:H (2000 ${\mu}$m), a-Si:H(2000 ${\mu}$m) and n+a-Si:H (500 ${\mu}$m), We have deposited n-a-Si:H, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-stopper pattern. The NPR layer by inverting pattern of upper gate electrode is patterned and the n+a-Si:H layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. In the fabricated TFT, the most frequent problems are over and under etching in etching process. We were able to improve properties of device by strict criterion on wet, dry etching and cleaning process.