• Journal of Korean Society of Industrial and Systems Engineering
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• v.36 no.4
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• pp.25-30
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• 2013

This article deals with the transient analysis in bicycle shifting using a discrete chain model. Among the various components of a bicycle, we focused in the power-transmissions on the contact points between the chain element and sprocket. And by imposing kinematic motions on the front and rear derailleurs, we analyzed the shifting mechanism for increasing the rotational speed of rear wheel. In order to build the dynamic analysis model, we first tore down the real bicycle and measured each component's design parameters. Then we made 3-dimensional CAD models for each component related to the power transmission of a bicycle. Using the converted 3-dimensional dynamic model for the simulation program, we performed non-shifting and shifting dynamic analysis. As a result, we investigated the dynamic behaviors of a discrete chain model focused on the interaction between the chain and sprocket wheel.

• Advances in Energy Research
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• v.1 no.2
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• pp.117-126
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• 2013

In this paper, core-shell semiconductor quantum dots (QDs) CdSeS/ZnS with emission at 490 nm and 450 nm were investigated for their use in luminescent down-shifting (LDS) layers. Luminescent quantum yield (LQY) of the QDs measurements in solution proposed that they were suitable candidates for inclusion in LDS layers. QDs were encapsulated in poly(methyl,methacrylate) (PMMA) polymer matrix and films were fabricated of $134{\pm}0.05$ microns. Selections of organic dyes from BASF Lumogen F range were also investigated for their use as LDS layers; Violet 570 and Yellow 083. The addition of LDS layers containing Violet 570 dye demonstrated a unity LQY when encapsulated within a PMMA matrix. A PV device of an LDS layer of Lumogen Violet 570 deposited on top of a crystalline silicon cell was fabricated where it was demonstrated to increase the efficiency of the cell by 34.5% relative.

• ETRI Journal
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• v.34 no.5
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• pp.727-733
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• 2012

This paper demonstrates a new driving scheme that allows reducing the supply voltage of data drivers for low-power active matrix organic light-emitting diode (AMOLED) displays. The proposed technique drives down the data voltage range by 50%, which subsequently diminishes in the peak power consumption of data drivers at the full white pattern by 75%. Because the gate voltage of a driving thin film transistor covers the same range as a conventional driving scheme by means of a level-shifting scheme, the low-data supply scheme achieves the equivalent dynamic range of OLED currents. The average power consumption of data drivers is reduced by 60% over 24 test images, and power consumption is kept below 25%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12B
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• pp.1733-1740
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• 2001

A monolithic 5 GHz image reject mixer using a 0.5-m GaAs MESFET technology is designed and simulated. The Mixer exhibits a 13.56 dB down-conversion gain, a SSB (Single SideBand) noise figure of 11.91 dB, an input IP3 (third order intercept point) of -3.73 dBm and a PldB (1-dB compression point) of -11.0 dBm. The critical issue in the image reject mixer is the phase accuracy and magnitude balance of the 90 phase shifting network. The proposed image reject mixer realizes a 90 phase shifter on chip. This phase shifting network does not need any phase adjusting to achieve the phase error specification of 3 over a frequency range from 800 MHz to 1GHz. The simulated overall image rejection ratio is better than 50 dB.

• Journal of the Korean Society for Precision Engineering
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• v.15 no.6
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• pp.58-63
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• 1998

There are lots of factors that are related to the geometric characteristics of machined surface. Among them, the tool path and milling mode (up cut milling or down cut milling) are the easiest controllable machining conditions. Thus, the first objective of this research is to study the effects of them on the milled surface that is generated by an end milling tool. To get precision parts, not only the machining process but also the measurement of geometric tolerance is important. But, this measurement requires a lot of time, because the infinite surface points must be measured in the ideal case. So, the second objective is to propose a simple flatness measurement method that can be available instead of the 3-D geometric tolerance measurement method, using a scale factor and characterized points. Finally, it is also shown that the possibility of flatness improvement by shifting the consecutive fine cutting tool path as compared with the last rough cutting tool path.

• Journal of Mechanical Science and Technology
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• v.14 no.7
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• pp.715-721
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• 2000

Residual stress is one of the causes which makes defects in engineering components and materials. These residual stresses can occur in many engineering structures and can sometimes lead to premature failures. There are commonly used methods by which residual stresses are currently measured. But these methods have a little damage and other problems; therefore, a new experimental technique has been devised to measure residual stress in materials with a combination of electronic laser interferometry, laser heating and finite element method. The electronic laser interferometer measures in-plane deformations while the laser heating and cooling provides for very localized stress relief. FEM is used for determining the heat temperature and other parameters. The residual stresses are determined by the amount of strain that is measured subsequent to the heat-up and cool-down of the region being interrogated. A simple model is presented to provide a description of the method. In this paper, the ambiguity problem for the fringe patterns has solved by a phase shifting method.

• Journal of the Korea Society for Simulation
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• v.15 no.2
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• pp.51-57
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• 2006

Production environment of semiconductor industry is shifting from 200mm wafer process to 300mm wafer process. In the new era of semiconductor industry, FAB (fabrication) Line Automation is a key issue that semiconductor industry is facing in shifting from 200mm wafer fabrication to 300mm wafer fabrication. In addition, since the semiconductor manufacturing technologies are being widely spread and market competitions are being stiffened, cost-down techniques became basis of growth. Most companies are trying to reduce average cycle time to increase productivity and delivery time. In this paper, we simulated 300mm wafer fabrication semiconductor manufacturing process by laying great emphasis on reduce average cycle time.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.6 s.348
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• pp.9-17
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• 2006

We proposed a new High-speed CMOS Level Up/Down Shifter circuits that can be used with Dynamic Voltage and Frequency Scaling(DVFS) algorithm, for low power system in the SoC(System-on-Chip). This circuit used to interface between the other voltage levels in each CMOS circuit boundary, or between multiple core voltage levels in a system bus. Proposed circuit have advantage that decrease speed attenuation and duty ratio distortion problems for interface. The level up/down shifter of the proposed circuit designed that operated from multi core voltages$(0.6\sim1.6V)$ to used voltage level for each IP at the 500MHz input frequency The proposed circuit supports level up shifting from the input voltage levels, that are standard I/O voltages 1.8V, 2.5V, 3.3V, to multiple core voltage levels in between of $0.6V\sim1.6V$, that are used internally in the system. And level down shifter reverse operated at 1Ghz input frequency for same condition. Simulations results are shown to verify the proposed function by Hspice simulation, with $0.6V\sim1.6V$ CMOS Process, $0.13{\mu}m$ IBM CMOS Process and $0.65{\mu}m$ CMOS model parameters. Moreover, it is researched delay time, power dissipation and duty ration distortion of the output voltage witch is proportional to the operating frequency for the proposed circuit.

• Journal of Korean Society of Rural Planning
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• v.12 no.2 s.31
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• pp.11-16
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• 2006

Value of rural amenity resources scattered in rural area is difficult to be assessed isolatedly. Rural Amenity Resources Map (RARM) is developed for assessing rural resources based on specific territory. In the developing process, knowledge based system is oriented because rural amenity is differed from personal feeling. Possible decision trees in RARM are developed in reviewing process of previous GIS based decision support systems, and information strategy planning is constructed for achieving goals such as rural tourism, down shifting, and rural investment.

• Journal of the Korean Society of Physical Medicine
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• v.3 no.2
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• pp.113-119
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• 2008

Purpose : In this case report, we demonstrated the improvement of gait ability on the child who has mental retardation with incomplete gait pattern. Methods : The subject was a 4 years old boy with mental retardation. We applied the Bobath approach to the subject. Treatments included to facilitate trunk alignment and stability, and to train weight bearing and shifting, to facilitate pelvis posterior-anterior movement, and to train walk especially stance phase and assist up-down stairs locomotion in environment similar to actual daily life. It was performed 24 sessions for 12 weeks. Results : With this treatment, he could accomplish dynamic standing stability and he could independent walk at the out door after 12 weeks. In gross motor function measure(GMFM), total motor function was improved to 85.6% from 75.7%. Conclusion : The gait ability of child with mental retardation was improved by using the bobath approach.