• The monthly packaging world
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• s.319
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• pp.98-103
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• 2019

• Journal of the Microelectronics and Packaging Society
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• v.3 no.2
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• pp.7-16
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• 1996

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.4
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• pp.275-280
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• 1999

The glass-to-glass electrostatic bonding process in vacuum environment was developed and the tubeless-packaged FED was fabricated based on the bonding process. The fabricated tubeless-packaged FED showed stable field emission characteristics and potential applicability to the FED tubeless packaging and vacuum in-line sealing.

• Journal of the Microelectronics and Packaging Society
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• v.4 no.2
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• pp.17-24
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• 1997

Spacer가 없는 Field Emission Display 정보표시소자의 진공 패키징시 패널 유리 두 께에 따른 패널 유리가 받는 응력과 패널의 중앙 부위에서의 변위를 계산하였다. 판의 각 모서리가 고정된 상태에서 일정한 압력을 받는 경우의 bending moment로부터 우리가 받는 압력을 계산하였으며 3.7"와 5.7"크기의 두가지 경우를 실험하여 계산값과 파괴양상 및 중앙 에서의 변위를 비교하였다.변위를 비교하였다.

• The monthly packaging world
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• s.265
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• pp.57-61
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• 2015

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.11a
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• pp.200-204
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• 2001

The high efficiency and high power inverter for driving LCD backlight was designed and fabricated. The operating frequency was variable and dimming capability was also included. High dimming ratio could be achieved by PWM dimming. The optimum driving condition for LCD backlight could be obtained by using the excited type inverter.

• Journal of Information Display
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• v.3 no.1
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• pp.11-16
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• 2002

This paper presents a study on the tubeless Plasma Display Panel (PDP) packaging using glass-to-glass electrostatic bonding with intermediate amorphous silicon. The bonded sample sealing the mixed gas with three species showed high strength ranging from 2.5 MPa to 4 MPa. The glass-to-glass bonding for packaging was performed at a low temperature of $180^{\circ}C$ by applying bias of 250 $V_{dc}$ in ambient of mixed gases of He-Ne(27 %)-Xe(3 %). The tubeless packaging was accomplished by bonding the support glass plate of $30mm{\times}50mm$ on the rear glass panel and the capping glass of $20mm{\times}20mm$. The 4-inch color AC-PDP with thickness of 8 mm was successfully fabricated and fully emitted as white color at a firing voltage of 190V.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.38-47
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• 2023

Three dimensional (3D) packaging is a next-generation packaging technology that vertically stacks chips such as memory devices. The necessity of 3D packaging is driven by the increasing demand for smaller, high-performance electronic devices (HPC, AI, HBM). Also, it facilitates innovative applications across another fields. With growing demand for high-performance devices, companies of semiconductor fields are trying advanced packaging techniques, including 2.5D and 3D packaging, MR-MUF, and hybrid bonding. These techniques are essential for achieving higher chip integration, but challenges in mass production and fine-pitch bump connectivity persist. Advanced bonding technologies are important for advancing the semiconductor industry. In this review, it was described 3D packaging technologies for chip integration including mass reflow, thermal compression bonding, laser assisted bonding, hybrid bonding.

• The monthly packaging world
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• s.227
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• pp.80-84
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• 2012

• The monthly packaging world
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• s.151
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• pp.79-83
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• 2005