• 제목/요약/키워드: digital signal processor(DSP)

검색결과 507건 처리시간 0.028초

3상 UPS 인버터의 출력전압 왜형률 개선을 위한 고조파 보상기법의 DSP 제어 (DSP Control of Three-Phase UPS Inverter with Output Voltage Harmonic Compensator)

  • 변영복;조기연;박성준;김철우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1997년도 전력전자학술대회 논문집
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    • pp.269-275
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    • 1997
  • This paper presents real time digital signal processor(DSP) control of UPS system feeding processor(DSP) control of UPS system feeding nonlinear loads to provide sinusoidal inverter output voltage. The control scheme is composed of an rms voltage compensator, the load current harmonics feed-forward loop for the cancellation of output voltage harmonics, and the output voltage harmonics feedback loop for system stability. The controller employs a Texas Instruments TMS320C40GFL50 DSP.

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Reed-Solomon 부호화/복호화를 위한 DSP 명령어 및 하드웨어 설계 (Design of DSP Instructions and their Hardware Architecture for Reed-Solomon Codecs)

  • 이재성;선우명훈
    • 한국통신학회논문지
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    • 제28권6A호
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    • pp.405-413
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    • 2003
  • 본 논문은 오류 정정을 위해 가장 많이 쓰이는 알고리즘 중 하나인 RS (Reed- Solomon) 부호화 및 복호화를 DSP (Digital Signal Processor) 칩에서 효율적으로 구현할 수 있는 새로운 명령어 및 하드웨어 구조를 제안한다. 제안한 구조는 원시 다항식의 변경에 따라 하드웨어를 재 설계할 필요가 없이 DSP 상에서 프로그램으로 변경이 가능하여 다양한 원시 다항식을 구현할 수 있다. 새로운 명령어 및 하드웨어 구조는 유한체 곱셈기 및 가산기를 이용하여 유한체 연산을 수행한다. 따라서, 제안한 DSP 구조는 기존 DSP 칩과 비교하여 복호화 속도를 향상시킬 수 있다. 본 하드웨어 구조는 130MHz 동작 주파수를 갖는 DSP 칩에서 228.1 Mbps의 RS 복호화 성능을 갖는다.

Digital Audio Effect System-on-a-Chip Based on Embedded DSP Core

  • Byun, Kyung-Jin;Kwon, Young-Su;Park, Seong-Mo;Eum, Nak-Woong
    • ETRI Journal
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    • 제31권6호
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    • pp.732-740
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    • 2009
  • This paper describes the implementation of a digital audio effect system-on-a-chip (SoC), which integrates an embedded digital signal processor (DSP) core, audio codec intellectual property, a number of peripheral blocks, and various audio effect algorithms. The audio effect SoC is developed using a software and hardware co-design method. In the design of the SoC, the embedded DSP and some dedicated hardware blocks are developed as a hardware design, while the audio effect algorithms are realized using a software centric method. Most of the audio effect algorithms are implemented using a C code with primitive functions that run on the embedded DSP, while the equalization effect, which requires a large amount of computation, is implemented using a dedicated hardware block with high flexibility. For the optimized implementation of audio effects, we exploit the primitive functions of the embedded DSP compiler, which is a very efficient way to reduce the code size and computation. The audio effect SoC was fabricated using a 0.18 ${\mu}m$ CMOS process and evaluated successfully on a real-time test board.

달 탐사선의 데이터 고속 전송을 위한 DSP 프로토타입 설계 및 성능 분석 (Design and Performance Analysis of DSP Prototype for High Data Rate Transmission of Lunar Orbiter)

  • 장연수;김상구;조경국;윤동원
    • 한국항공우주학회지
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    • 제39권1호
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    • pp.63-68
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    • 2011
  • 세계 각국은 달 탐사에 대한 연구를 활발하게 진행하고 있으며 우리나라에서도 달 탐사 임무를 수행하기 위한 기초연구가 이루어지고 있다. 성공적인 달 탐사 임무 수행을 위한 통신 시스템의 개발은 달 탐사 프로젝트에 있어서 중요한 부분이다. 본 논문에서는 기저대역 프로세서 개발을 위한 기본 연구로써 달 탐사 통신 링크에 대한 요구조건 분석을 바탕으로 DSP 프로토타입 시스템을 설계하고 심우주 통신을 위한 국제 표준을 고려하여 각 핵심 모듈을 구현한다. DSP 프로토타입의 비트 오류 확률 값을 컴퓨터 시뮬레이션 결과와 비교함으로써 검증한다.

DSP를 이용한 자기공명영상시스템의 경사자계 파형 발생기 (Gradient Waveform Synthesizer in Magnetic Resonance Imaging System using Digital Signal Processors)

  • 고광혁;권의석;김치영;김휴정;김상묵;안창범
    • 대한전기학회논문지:시스템및제어부문D
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    • 제49권1호
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    • pp.48-53
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    • 2000
  • In this paper, we develop a TMS320C31 (60MHz) digital signal processor (DSP) board to synthesize gradient waveforms for Spiral Scan Imaging (SSI), which is one of the ultra fast magnetic resonance imaging (MRI) methods widely used. In SSI, accurate gradient waveforms are very essential to high quality magnetic resonance images. For this purpose, sampling rate for synthesizing the gradient waveforms is set twice as high as the data sampling rate. With the developed DSP boards accurate gradient waveforms are obtained. Ultra fast spiral scan imaging with the developed with the developed DSP board is currently under development.

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3차원 전류좌표계 해석법에 의한 DSP 전력분석 제어장치에 관한 연구 (A study on DSP based power analyzing and control system by analysis of 3-dimensional space current co-ordinates)

  • 임영철;정영국;나석환;최찬학;장영학;양승학
    • 대한전기학회논문지
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    • 제45권4호
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    • pp.543-552
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    • 1996
  • The goal of this paper is to developed a DSP based power analyzing and control system by 3-Dimensional (3-D) space current co-ordinates. A developed system is made up of 486-PC and DSP (Digital Signal Processor) board, Active Power Filter, Non-linear thyristor load, and Power analyzing and control program for Windows. Power is analyzed using signal processing techniques based on the correlation between voltage and current waveforms. Since power analysis algorithm is performed by DSP, power analysis is achieved in real-time even under highly dynamic nonlinear loading conditions. Combining control algorithm with power analysis algorithm is performed by DSP, power analysis is achieved in real-time even under highly dynamic nonlinear loading conditions. Combining control algorithm with power analysis algorithm, flexibility of the proposed system which has both power analysis mode and control mode, is greatly enhanced. Non-active power generated while speed of induction motor is controlled by modulating firing angle of thyristor converter, is compensated by Active Power Filter for verifying a developed system. Power analysis results, before/after compensation, are numerically obtained and evaluated. From these results, various graphic screens for time/frequency/3-D current co-ordinate system are displayed on PC. By real-time analysis of power using a developed system, power quality is evaluated, and compared with that of conventional current co-ordinate system. (author). refs., figs. tabs.

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DSP를 이용한 Synchronous Buck Converter의 병렬 제어 (Parallel Control of Synchronous Buck Converter Using DSP)

  • 김정훈;임정규;신휘범;정세교;이현우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2006년도 전력전자학술대회 논문집
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    • pp.140-142
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    • 2006
  • This paper represents a digital parallel control of a synchronous buck converter using a digital signal processor (DSP). The digital PWM and load sharing controller is implemented in the DSP TMS320F2812 and the experimental results are provided to show the feasibility of the digital synchronous buck regulator.

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A Real-Time DSP-Based Imbalance Analysis System for Rotating Machine with Vibration Signal

  • Su Hua;Huang Linglong;Chong Kil To
    • Journal of Mechanical Science and Technology
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    • 제19권6호
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    • pp.1243-1252
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    • 2005
  • This paper describes a new digital signal processor (DSP) imbalance measurement system dedicated to real-time vibration analysis on rotating machine. To accomplish real-time analysis, the vibration signals are on-line acquired and processed to analyze the mass imbalance and phase position. This is achieved through the use of FFT and Lissajous diagram. The method followed to analyze the mass imbalance with the chosen hardware and software solutions are described in detail in this paper. Several experimental tests demonstrate the efficiency and accuracy in imbalance analysis performance of the DSP system.

DSP를 이용한 브러쉬 없는 선형 모터 드라이브 구현 (Implementation of Brushless Linear Motor Drive using DSP)

  • 김상우;박정일;이기동;이석규;정재한
    • 한국정밀공학회지
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    • 제19권8호
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    • pp.155-160
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    • 2002
  • In this paper, a controller design for brushless linear motor is implemented. The designed controller is mainly composed of current, speed and position controller, which are carried out by the high-speed digital signal processor (DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented by using 32-bit DSP (TMS320C31), a high-integrated logic device (EPM7192), and IPM (Intelligent Power Module) for compact and powerful system design. The experimental results show the effective performance of controller for the brushless linear motor.

멀티코어 DSP 기반 소프트웨어 정의 라디오 플랫폼을 활용한 LTE 전송 채널의 구현 (Implementation of LTE Transport Channel on Multicore DSP Software Defined Radio Platform)

  • 이진
    • 한국정보통신학회논문지
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    • 제24권4호
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    • pp.508-514
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    • 2020
  • LTE (Long Term Evolution) 및 5G와 같이 지속적으로 발전하는 이동 통신 표준을 구현하기 위해 소프트웨어 정의 라디오 (SDR, Software Defined Radio) 개념은 뛰어난 유연성과 효율성을 제공한다. 수년 동안, 최고급 디지털 시그널 프로세서 (DSP, Digital Signal Processor) 시스템 온 칩 (SoC, System on Chip)은 멀티 코어 및 다양한 하드웨어 보조 프로세서를 지원하는 방향으로 개발되어왔다. 이 논문에서는 TI의 TCI663x 칩을 사용해 구현한 SDR 플랫폼 하드웨어에 대해 소개하고, 이 플랫폼 상에서 멀티 코어 DSP를 BCP (Bit Rate Coprocessor) 및 TPC (Turbo Decoder Coprocessor)와 연동하여 구현한 LTE 전송 채널 (Transport Channel)의 성능을 다양한 구현 옵션에 따라 평가한다.