• Title/Summary/Keyword: digital signal process

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A Study on the Chaotic Random Signal Generator (카오스적인 랜덤신호 발생에 관한 연구)

  • 구인수;김환우
    • Journal of Korea Society of Industrial Information Systems
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    • v.4 no.3
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    • pp.90-94
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    • 1999
  • To prevent the congruent output of the digital psuedo-random transformation from giving the same randomness, a transformation of seemingly random deterministic process, called Chaotic transformation, is introduced. Passing through a Chaotic transformation, each event(descriptor) will produce chaotic random sequences. haotic transformation is designed on the basis of deterministic chaos function and also can be realized by simple hardware like shift registers. The circuit of chaotic transformation implemented with the shift registers is presented and the chaotic behavior of suggested circuit is explained with the characteristics of saw-tooth function with the chaotic behavior.

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Complexity Reduction Algorithm of Speech Coder(EVRC) for CDMA Digital Cellular System

  • Min, So-Yeon
    • Journal of Korea Multimedia Society
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    • v.10 no.12
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    • pp.1551-1558
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    • 2007
  • The standard of evaluating function of speech coder for mobile telecommunication can be shown in channel capacity, noise immunity, encryption, complexity and encoding delay largely. This study is an algorithm to reduce complexity applying to CDMA(Code Division Multiple Access) mobile telecommunication system, which has a benefit of keeping the existing advantage of telecommunication quality and low transmission rate. This paper has an objective to reduce the computing complexity by controlling the frequency band nonuniform during the changing process of LSP(Line Spectrum Pairs) parameters from LPC(Line Predictive Coding) coefficients used for EVRC(Enhanced Variable-Rate Coder, IS-127) speech coders. Its experimental result showed that when comparing the speech coder applied by the proposed algorithm with the existing EVRC speech coder, it's decreased by 45% at average. Also, the values of LSP parameters, Synthetic speech signal and Spectrogram test result were obtained same as the existing method.

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A Study on the Parameter Measurement of Three Phase Brushless DC Moto (삼상 브러시리스 직류전동기의 파라미터 측정에 관한 연구)

  • 임영철;장영학;조경영;정영국
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.5 no.3
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    • pp.54-63
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    • 1991
  • This paper describes an effort to develope a microcomputer-based parameter measurement system for a brushless DC motor. Back EMF equation is derived from back EMF waveform of a brushless DC motor. To minimize error the due to the ripple component in the measured armature current, digital averaging filter is employed. The whole identification process of signal generation, measurement parameter determination is fully automated. A new identification algorithm for the brushless DC motor parameters is developed. New parameter correction method is proposed using the deadzone current and the time to reach the peak current. In the proposed correction method, the measured current is in excellent agreement with the estimated current.

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A Watermarking Technique Using Means and Differences of Neighboring Wavelet Transform Coefficient Pairs (이웃한 웨이브릿 변환 계수 쌍의 평균과 차이를 이용한 워터마킹 기법)

  • Kim, Hyeon-Sun;Bae, Seong-Ho;Park, Gil-Heum
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.6
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    • pp.1980-1987
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    • 2000
  • In this paper, an efficient watermarking technique in wavelet transform domain is proposed. Watermarking is embedding a digital signal called as 'watermark' into images to claim the ownership. In the proposed method, the image is 1-level wavelet transformed, and then the watermark with a binary stamp is embedded into the baseband. The watermark is embedded by inverting the polarities of he selected coefficient paris. In the inverting process, we can increase image quality by finding means and differences of the selected neighboring coefficient paris, and then adding values, which are inversely proportional to the differences, to th means. The experimental results show that the proposed method has good quality and is robust to various attacks such as the JPEG lossy comparison, noise addition, clipping, blurring, etc.

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A Study on the Development of Experimental Method for ACC Using Powertrain HILS (파워트레인 HILS를 이용한 차량간격 제어장치의 실험기법 개발에 관한 연구)

  • 백창현;윤원석;장광수
    • Transactions of the Korean Society of Automotive Engineers
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    • v.7 no.6
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    • pp.165-173
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    • 1999
  • HILS system consists of hardwares which are engine and dynamometer and softwares which is vehicle model without the engine. It is well-known that because of engines's nonlinearity it is difficult to describe an engine exactly and not to lose it reality coincidently. But HILS system is the high technology that can compensate this weakness by using a real engine instead of model. The various experiments regarding the ACC which are not normally available for real vehicle tests have been performed by the HILS system. From the results , the HILS system is expected to decrease the experimental accident rate and save costs and time. Compared with simulation, HILS experimental results show similarities and expected to increase road capacity.

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Robust Audio Watermarking Using HAS and Neural Network (신경망과 HAS을 이용한 강인한 오디오 워터마킹 알고리즘)

  • Jung, Se-Won;Piao, Cheng-Ri;Han, Seung-Soo
    • Proceedings of the KIEE Conference
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    • 2006.07d
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    • pp.2101-2102
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    • 2006
  • In this paper, a new digital audio watermarking algorithm is presented. The proposed algorithm embeds watermark into audio signal based on human auditory system (HAS). This algorithm is a blind audio watermarking method, which does not require any prior information during watermark extraction process. This algorithm finds watermarking position using time-domain masking effect. First we insert the watermark into wavelet domain, and then we use a back-propagation neural network (BPN) to learn the characteristics of relationship between the watermark and the watermarked audio. Due to the teaming and adaptive capabilities of the BPN, the false recovery of the watermark can be greatly reduced by the trained BPN. Experimental results show that the proposed method has good inaudibility and high robustness to common audio processing attacks.

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Implementation of active mufflers using stabilized adaptive IIR filters (안정한 적응 IIR 필터를 사용한 능동머플러 구현)

  • Bang, Kyung-Uk;Seo, Sung-Dae;Nam, Hyun-Do
    • Proceedings of the KIEE Conference
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    • 2005.07d
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    • pp.3066-3068
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    • 2005
  • Noise can make surrounding environments inferior and deteriorates operation efficiency, and it can bring aural damage as well as give a person psychological stress. Therefore, necessity of study about noise control is increased for better labor conditions and agreeable habitat. In this paper, implementation of active mufflers using a stable IIR adaptive filters is presented. The IIR filter structure is more effective when acoustic feedback exists, but the adaptive IIR filters could be unstable when the filter algorithm is not yet converged. A stabilizing process for adaptive IIR filter is introduced in this paper. Experiments using a TMS320C32 digital signal processor have performed to show the effectiveness of a proposed algorithm.

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NEURAL CHANDRASEKHAR FILTERING METHOD FOR STETIONARY SIGNAL PROCESSES

  • Sugisaka, Masanori
    • 제어로봇시스템학회:학술대회논문집
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    • 1994.10a
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    • pp.742-745
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    • 1994
  • In this paper we show the performance of neural Chandrasekhar filtering which is a special case for the new method of neural filtering using the artificial neural network systems developed recently for the filtering problems of linear and nonlinear, stationary and nonstationary stochastic signals. The neurofilter developed has either the finite impulse response(FIR) structure or the infinite impulse response(IIR) structure. The neurofilter differs from the conventional linear digital FIR and IIR filters because the artificial neural network system used in the neurofilter has nonlinear structure due to the sigmoid function. Numerical studies for the estimation of a second order Butterworth process are performed by changing the structures of the neurofilter in order to evaluate the performance indices under the changes of the output noises or disturbances. In the numerical studies both Chandrasekhar filtering estimates and true signals are used as the training signals for the neurofilter. The results obtained from the studies verified the capabilities which are essentially necessary for on-line filtering of various stochastic signals.

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A study on the correction of a position and orientation of the chip using DSP in the 2nd plane (DSP를 이용한 2차원 평면에서 chip의 위치와 자세보정에 관한 연구)

  • 유창목;차영엽
    • 제어로봇시스템학회:학술대회논문집
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    • 1996.10b
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    • pp.1316-1319
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    • 1996
  • This paper proposes the algorithm for the correction of a position and orientation of small object such as chip in the precise construction process. In the past, it is general to correct position and orientation of object using human sight and simple vision sensors. But recently, researches using image processing devices have been studied to improve the corrective precision of a position and orientation of object. In this piper, maximum-axis moment and p-theta algorithm are used to correct the position and orientation. Algorithm of maximum-axis moment is widely applied to hetero-object except being applied to a perfect rectangle. This is reason that moments of the X and Y-axis are equal. Therefore, being the shape of a perfect rectangle, the object is applied to other algorithm. In the light of time problem, real-time control is as important as correction of object. To solve it, we use the DSP(Digital Signal Processing) which is far more fast than PC.

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A Study of a High Performance Capacitive Sensing Scheme Using a Floating-Gate MOS Transistor

  • Jung, Seung-Min
    • Journal of information and communication convergence engineering
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    • v.10 no.2
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    • pp.194-199
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    • 2012
  • This paper proposes a novel scheme of a gray scale fingerprint image for a high-accuracy capacitive sensor chip. The conventional grayscale image scheme uses a digital-to-analog converter (DAC) of a large-scale layout or charge-pump circuit with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit for the charge sharing scheme is proposed, which uses a down literal circuit (DLC) with a floating-gate metal-oxide semiconductor transistor (FGMOS) based on a neuron model. The detection circuit is designed and simulated in a 3.3 V, 0.35 ${\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, the pixel layout size can be reduced and the image resolution can be improved.