• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.12
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• pp.10-18
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• 1997

The parallel trabutary signals in the SDH-based transmission system have the frame phase skew due to uneven transmission delays in the data and the clock path. This phase skew must be eliminated prior to synchronously multiplexing process. A new twenty-four channel, 51.84Mb/s DFPA(Digital Frame Phase Aligner) has been designed and fabricated in 0.8.mu.m CMOS gate array. This unique device phase-aligns the skewed input signals with refernce frame synchronous signal and reference clok for subsequent synchronous multiplexing process. the performance of fabricated device is evaluated by the STM-16 transmission system and DS-3 meansurement set. The frame phase margin of +2/-3 bit periods has been demonstrated.

• Journal of Satellite, Information and Communications
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• v.7 no.3
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• pp.135-139
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• 2012

A digital controller can simply realize a complex operation algorithm and power control process which can not be applied by an analog circuit for a solar array regulator(SAR). The digital resistive control(DRC) makes an equivalent input impedance of the SAR be resistive characteristic. The resistance of the solar array varies largely in a voltage source region and slightly in a current source region. Therefore when the solar array regulator is controlled by the DRC, the Advanced Incremental Conductance MPPT Algorithm with a Variable Step Size(AIC-MPPT-VSS) is suitable. The AIC-MPPT-VSS, however, using small signal resistance and large signal resistance of the solar array can not limit the absolute value of the solar array power. In this paper, the solar array power limiter is suggested and the BUCK-BOOST type SAR which is fully controlled by the digital controller is verified by simulation.

• Journal of Digital Convergence
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• v.17 no.10
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• pp.251-258
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• 2019

In the future, various products are created in various fields using artificial intelligence. In this age, it is a very important problem to know the operation principle of artificial intelligence learning method and to use it correctly. This paper introduces artificial intelligence learning methods that have been known so far. Learning of artificial intelligence is based on the fixed point iteration method of mathematics. The GD(Gradient Descent) method, which adjusts the convergence speed based on the fixed point iteration method, the Momentum method to summate the amount of gradient, and finally, the Adam method that mixed these methods. This paper describes the advantages and disadvantages of each method. In particularly, the Adam method having adaptivity controls learning ability of machine learning. And we analyze how these methods affect digital signals. The changes in the learning process of digital signals are the basis of accurate application and accurate judgment in the future work and research using artificial intelligence.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.152-159
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• 2016

This paper describes an offset and 1/f noise cancellation technique based hall sensor signal processor. The hall sensor outputs a hall voltage from the input magnetic field, which direction is orthogonal to hall plate. The two major elements to complete the hall sensor operation are: the one is a hall sensor to generate hall voltage from input magentic field, and the other one is a hall signal process system to cancel the offset and 1/f noise of hall signal. The proposed hall sensor splits the hall signal and unwanted signals(i.e. offset and 1/f noise) using a spinning current biasing technique and chopper stabilizer. The hall signal converted to 100 kHz and unwanted signals stay around DC frequency pass through chopper stabilizer. The unwanted signals are bloked by highpass filter which, 60 kHz cut off freqyency. Therefore only pure hall signal is enter the ADC(analog to dogital converter) for digitalize. The hall signal and unwanted signal at the output of an amplifer and highpass filter, which increase the power level of hall signal and cancel the unwanted signals are -53.9 dBm @ 100 kHz and -101.3 dBm @ 10 kHz. The ADC output of hall sensor signal process system has -5.0 dBm hall signal at 100 kHz frequency and -55.0 dBm unwanted signals at 10 kHz frequency.

• Journal of the Korea Society of Computer and Information
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• v.6 no.2
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• pp.108-115
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• 2001

SDH-based SHR networks are the reconfiguration process in case of failure and APS protocol used. In this study, addresses the maximum allowed recovery time in two fiber bidirectional networks. We analyse the APS protocol and derive the Processing time domains of each n order to cope with the maximum reconfiguration time of 50㎳, as specified in the ITU-T standard. We finally analyze the interleaved failures. One is the signal degrade then the signal failure, the other is the signal failure then the signal failure. Any case analysis is carried out. reconfiguration time can be guaranteed.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2167-2168
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• 2006

Mobilecomputer of offers more fundamental role than role assistance enemy of modem technology equipment and new Information Technology can reconsider, and reconstruct creatively accuracy of physiological concept. That military register symptoms are developed of disease, before far before rehalibitation, of for possibility that can intervene in process that motive change of military register symptoms after rehalibitation. But, that many parameters become analysis target and mathematical settlement and equalization system of noted data of that is huge, same time collection of all datas can lift difficulty etc.. These main weakness puts in structural relation between elements that compose system. Therefore, dynamics research that time urea of systematic adjustment has selected method code Tuesday nerve dynamics enemy who groping of approach that become analysis point is proper and do with recycling bioelectricity signal. Nature model of do living body signal digital analysis chapter as research result could be developed and scientific foundation groping could apply HSS (Hardware-software system) by rehalibitation purpose. Special quality that isdone radish form Tuesday of bioelectricity signal formation furthermore studied, and by the result, fundamental process of bodysignal in do structure circuit form of analog - digital water supply height modelling do can.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.1
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• pp.54-61
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• 2008

This paper presents a new TIQ based CMOS flash 6-bit ADC to process digital signal in real time. In order to improve the conversion speed of ADC by designing new logic or layout of ADC circuits, a new design method is proposed in encoding logic circuits. The proposed encoding circuits convert analog input into digitally encoded double base number system(DBNS), which uses two bases unlike the normal binary representation scheme. The DBNS adopts binary and ternary radix to enhance digital arithmetic processing capability. In the DBNS, the addition and multiplication can be processed with just shift operations only. Finding near canonical representation is the most important work in general DBNS. But the main disadvantage of DBNS representation in ADC is the fan-in problem. Thus, an equal distribution algorithm is developed to solve the fan-in problem after assignment the prime numbers first. The conversion speed of simulation result was 1.6 GSPS, at 1.8V power with the Magna $0.18{\mu}m$ CMOS process, and the maximum power consumption was 38.71mW.

• Journal of Sensor Science and Technology
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• v.19 no.1
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• pp.43-51
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• 2010

In this study, wearable ECG measurement system was implemented for health monitoring during daily life. A wearable belt-type ECG electrode worn around the chest by measuring the real-time ECG is produced in order to minimize the inconvenience in wearing. The measured ECG signal is transmitted via an ultra low power consumption wireless data communications unit to personal computer using Zigbee-compatible wireless sensor node. The ECG monitoring program is developed at end user which is personal computer. The measured ECG contains many noises mainly due to motion artifacts. For ECG signal processing, adaptive filtering process is proposed which can reduce motion artifacts efficiently and accurately than digital filter. The experimental results show that a reliable performance with high quality ECG signal can be achieved using this wearable ECG monitoring system.

• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.6
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• pp.1-10
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• 1979

Recent progresses in the signal processing technique in digital domain as well as that of analogue, impose a heavy burden on scientists and engineers intending to study this dis cipline, we surveyed basic tools for these vast branches to help those who have concerns on this field without being buried in detailed techniques. The first article is naturally confined to the basic tools namely random process analysis and characterization of random signal by covariance function.

• Journal of Industrial Technology
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• v.22 no.B
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• pp.133-139
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• 2002

In precision instrumentation system, an A/D conversion of signal conditioning has been always suffered from some problems ; offset and drift voltage with environmental situation. This paper suggests a method of reducing the offset voltage and the drift error from the A/D conversion hardware using analog signal switching technique with specific operational amplifier circuits. Also, we have designed a hardware active filter and a software digital filter with Auto Zero Tracking algorithm for better dignal process of the our proposed weighing system. Software technique was performed to obtain the stable data from A/D converter. As a result of our experimental works, the proposed system is expected to be used in the industrial field where a high precision measurement is required.