• Journal of electromagnetic engineering and science
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• 제2권2호
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• pp.117-123
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• 2002

This paper describes the design for the resistive FET mixer with low If for the 4-Ch DBF(Digital Beam Forming) receiver This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(If) considered in this research are 2.09 GHz, 2.08 CHz and 10 MHz, respectively. This mixer is composed of band pass filter, a low pass filter and a DC bias circuit. Super low noise HJ FET of NE3210S01 is considered in design. The RE input power, LO input power and Vcs are used -10 dBm, 6 dBm and -0.4 V, respectively. In the 4-Ch resistive FET mixer, the measured If and harmonic components of 10 MHe, 20 MHz and 2.087 CHz are about -19.2 dBm, -66 dBm and -48 dBm, respectively The If output power observed at each channel of 10 MHz is about -19.2 dBm and it is higher 28.8 dBm than the maximum harmonic component of 2.087 CHz. Each If output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.

• Journal of electromagnetic engineering and science
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• 제4권4호
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• pp.143-149
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• 2004

This paper describes characteristics of the single-balanced low IF resistive FET mixer for the digital beam forming(DBF) receiver. This DBF receiver based on the direct conversion method is designed with Low IF I and Q channel. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(IF) considered in this research are 1950 MHz, 1940 MHz and 10 MHz, respectively. Super low noise HJ FET of NE3210S01 is considered in design. The measured results of the proposed mixer are observed IF output power of -22.8 dBm without spurious signal at 10 MHz, conversion loss of -12.8 dB, isolation characteristics of -20 dB below, 1 dB gain compression point(PldB) of -3.9 dBm, input third order intercept point(IIP3) of 20 dBm, output third order intercept point(OIP3) of 4 dBm and dynamic range of 30 dBm. The proposed mixer has 1.0 dB higher IIP3 than previously published single-balanced resistive and GaAs FET mixers, and has 3.0 dB higher IIP3 and 4.3 dB higher PldB than CMOS mixers. This mixer was fabricated on 0.7874 mm thick microstrip $substrate(\varepsilon_r=2.5)$ and the total size is $123.1\;mm\times107.6\;mm$.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 학술대회지
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• pp.667-670
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• 2004

In this paper, we have presented the improved IF transceiver architecture and the implementation and experimental results on re-configurable transceiver based on digital IF for multiple wideband OFDM/TDD base stations for high-speed portable internet-service in which is issued Korea. The implemented IF transceiver has been designed to support multiple frequency allocations and multiple standards by only modifying the programmable software not its hardware like as the software-defined-radio concept. Also, the digital complex quadrature modulation technique has been used for the digital IF transmitter, which is able to combine multiple frequency bands in digital processing block not RF block and to reject the image frequency signals. And the bandpass sampling technique has been used for the digital IF receiver to reduce the sampling rate of ADC. This paper has shown the experiment results on the frequency response and constellation on the base-station implemented using the modified IEEE 802.16a/e physical layer channel structure based on OFDM/TDD.

• Journal of information and communication convergence engineering
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• 제2권4호
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• pp.205-208
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• 2004

In this paper, we analyzed the performance of SDR-based dual-band CDMA system in wideband multipath channel employing RAKE receiver with MRC diversity. For the simulation of SDR-based dual-band CDMA system, we used digital IF techniques, polyphase analysis filter bank as channelizer. Also, Remez exchange algorithm is employed in the realization of the digital filter in the polyphase analysis filter bank. For performance analysis of dual-band CDMA system, we consider power loss of IF signal after passing through channel and the filter. Also, the performance for different sampling rates is analyzed.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.993-997
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• 2004

A data error inspection algorithm for wireless digital data communication was developed. Original data converted By wireless digital data error inspection algorithm. Wireless digital data is high possibility to get distortion and lose by noise and barrier on wireless. If the data check damaged and lost at receiver, can't make it clear and can't judge whether this data is right or not. Therefore, by wireless transmission data need the data error inspection algorithm in order to decrease the data distortion and lose and to monitoring the transmission data as real time. This study consists of RF station for wireless transmission, Water Level Meter station for water level measurement and Error inspection algorithm for error check of transmission data. This study is also that investigation and search for error inspection algorithm in order to wireless digital data transmission in condition of the least data's damage and lose. Designed transmitter and receiver with one - chip micro process to protect to swell the volume of circuit. Had designed RF transmitter - receiver station simply by means of ATMEL one - chip micro processing the systems. Used 10mW of the best RF power and 448MHz-449MHz on frequency band which is open to public touse free within the limited power.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권4호
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• pp.276-281
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• 2005

This paper presents a low voltage operating IF QPSK receiver block which is consisted of programmable gain amplifier (PGA) and analog to digital converter. This PGA has 6 bit control and 250MHz bandwidth, $0{\sim}20\;dB$ gain range. Using the proposed PGA architecture (low distortion gain control switch block), we can process the continuous fully differential $0.2{\sim}2.5Vpp$ input/output range and 44MHz carrier with 2 MHz bandwidth signal at 1.8V supply voltage. Using the sub-sampling technique (input freq. is $44{\sim}46MHz$, sampling freq. is 25MHz), we can process the IF QPSK signal ($44{\sim}46MHz$) which is the output of the 6 bit PGA. We can get the SNDR 35dB, which is the result of PGA and ADC at full gain mode. We fabricated the PGA and ADC and the digital signal processing block of the IF QPSK with the 0.18um CMOS MIM process 1.8V Supply.

• ETRI Journal
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• 제46권2호
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• pp.238-249
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• 2024

Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.97-97
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• 2000

In this paper, a signal processing algorithm for software GPS receiver is proposed. The signal processor takes snapshot of the sampled If signal from the RF section of the GPS receiver. All the processing for code and carrier tracking and correlation are implemented using the digital signal processing techniques. In order to achieve fast code acquisition, correlation of the incoming GPS signal is performed using the FFT method, After code acquisition, to reduce the Doppler shift effect and increase the accuracy, the interpolation or the tracking are performed. The performance of the proposed processing algorithm is first evaluated using matlab/simulink. A signal acquisition board for sampling and logging GPS IF signal form the Mitel GPS RF chip set is constructed. In order to analyze the performance of the designed algorithm the experiments are performed and the results are analyzed.

• 대한원격탐사학회:학술대회논문집
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• 대한원격탐사학회 2002년도 Proceedings of International Symposium on Remote Sensing
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• pp.297-302
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• 2002

The subsystems of two channel correlation radiometer such as RF front-end, IF and LF unit, LO unit, software based I/Q demodulator and complex correlator are characterized and their performance is analyzed in this paper. The limited hardware calibration method and receiver design consideration are discussed. The receiver architecture of 37GHz correlation radiometer is integrated. The designed radiometer employs a single-sideband superheterodyne receiver. The center frequency of the radiometer is 37 GHz and IF center frequency is 1.95 GHz with the equivalent noise bandwidth of 79.6 MHz. The receiver has less than 4.2 dB noise figure which is calculated by the Y-factor method and its gain can be adjusted from 60 dB to 80 dB.

• 한국통신학회논문지
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• 제38A권8호
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• pp.638-643
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• 2013

카오스 방정식의 초기 조건이 미세하게 변하면 전혀 다른 신호가 생성되기 때문에 카오스 통신은 초기 조건에 민감한 특징을 갖는다. 또한, 카오스 통신 시스템은 비주기성, 광대역성, 신호의 비예측성, 구현의 용이성 등의 특성을 가지고 있다. 이런 특징으로 인해 카오스 통신 시스템은 다른 시스템에 비해 보안성이 우수하게 평가된다. 하지만 기존 카오스 통신 시스템의 송신기와 수신기는 간섭 신호나 잡음에 영향을 많이 받기 때문에 BER 성능은 다른 디지털 시스템보다 나쁘게 평가된다. 그래서 카오스 통신 시스템의 BER 성능을 향상시키기 위한 연구가 지속적으로 이루어지고 있다. 본 논문에서는 BER 성능 향상을 위한 새로운 CDSK 수신기를 제안한다. 기존 CDSK 수신기와 제안한 CDSK 수신기의 BER 성능 비교와 제안한 CDSK 수신기의 BER 성능 향상을 평가한다. 또한, 새로운 CDSK 수신기를 사용할 때, 확산인자에 따른 BER 성능을 평가하여 최적의 확산인자를 찾는다. 새로운 CDSK 수신기를 사용하면 기존 CDSK 수신기보다 BER 성능이 향상되며 간섭 신호나 잡음의 영향을 거의 받지 않기 때문에 확산인자 값이 커질수록 BER 성능은 향상된다.