• 제목/요약/키워드: differential circuits

검색결과 127건 처리시간 0.024초

ISG법에 의한 금속과 세라믹기판과의 밀착력 향상 (Adhesion improvement between metal and ceramic substrate by using ISG process)

  • 김동규;이홍로;추현식
    • 한국표면공학회지
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    • 제32권6호
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    • pp.709-716
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    • 1999
  • Ceramic is select for an alternative substrate material for high-speed circuits due to its low-thermal expansion. As, in this study, ceramic was prepared by ISG (interlayer sol-gel) process using metal salts and a metal alkoxide as the starting materials. Generally ceramic substrate is used electroless copper plating for the metallization. But it has been indicate weakely the adhesion strength between the substrate and copper layer. Therefore, this research, using the ISG process on the preparation of homogeneous and possible preparation at law temperature fabricated sol solution. Using of the dip coating method was coated for the purpose of giving the anchoring effect on the coating layer and enhancing the adhesion strength between the $Al_2$O$_3$ substrate and copper layer. This study examined primary the characteristic of the sol making condition and differential thermal analysis (DTA) X-ray diffraction (XRD) were mearsured to identify the crystal phase of heat treatment specimens. The morphology of the coated films were studied by scanning electron microscopy(SEM). As a resurt, XRD analysis was obtained patterns of $\alpha$-cordierite after heat-treatment about 2 hours at $1000^{\circ}C$. SEM analysis could have seen a large number of voids on coated film. The more contants of$ Al_2$$O_3$ Wt% was increased the more voids was advanced. Peel adhesion strength has a maximum in the contants of the TEOS:ANE of 1:0.7 mole%. In this case, adhesion strength has been measured 1150gf, peel adhesion strength were about 10 times more than uncoated of the ceramics film.

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Design Optimization of Hybrid-Integrated 20-Gb/s Optical Receivers

  • Jung, Hyun-Yong;Youn, Jin-Sung;Choi, Woo-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권4호
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    • pp.443-450
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    • 2014
  • This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

손목형 생체신호수집 장치에 대한 연구 (A Study on Wrist Band Type Vital Sign Acquisition Device)

  • 김희훈;김경호
    • 전기학회논문지
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    • 제65권5호
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    • pp.857-861
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    • 2016
  • In this study, we proposed a new method that can be measure ECG (Electrocardiography) and PPG (Photoplethysmography) in realtime on the site of the wrist for check the state of health in daily life. For convenience measurement of ECG the lead I method was used on the wrist, and omit the reference junction ECG I was measured in the right hand and the left hand of the potential difference. Then the measured electrocardiogram was amplified by the differential amplifier and the signals were passed HPF, LPF, and BPF filters. For removing the PPG's noise from the Motion artifact and temperature, we apply the reflective photoelectric volume pulse wave measurement method using green LED as a light source. The circuits was designed to be able to check the waveform using higher active amplification method at weak signals. For the validation of our device, the measured signals were compared with E2-KIT on same time. The results shows that the error does not exceed the maximum one, most of the data is confirmed to be issued Peak inspection of the same number.

유도전동기의 자기 등가 회로 해석을 위한 자기회로 매트릭스 구성 (The Formation of Magnetic-circuit Matrix for analyzing the Magnetic Equivalent Circuit of an Induction Motor)

  • 최재영;이은웅;구태만;이동주;정종호;우성봉
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 B
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    • pp.635-637
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    • 2000
  • To analyze the transient state of an induction motor, there have been studies for using the magnetic equivalent circuit method (MECM) instead of the time differential finite-element method, MECM which analyzes magnetic equivalent circuits after converting each part of an electric machine into the magnetic circuit elements. has the merits of short calculation-time and comparatively accurate results. To analyze an electric machine with MECM, we have to replace stator and rotor with the magnetic elements and express the air gap, where electromechanical energy conversion takes place, with the permeance. So in this paper, to analyze an Induction Motor with MECM, we express the magnetic equivalent circuit as algebraic equations and then as the matrix for solving easily them.

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A 0.13 ${\mu}m$ CMOS UWB RF Transmitter with an On-Chip T/R Switch

  • Kim, Chang-Wan;Duong, Quoc-Hoang;Lee, Seung-Sik;Lee, Sang-Gug
    • ETRI Journal
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    • 제30권4호
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    • pp.526-534
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    • 2008
  • This paper presents a fully integrated 0.13 ${\mu}m$ CMOS MB-OFDM UWB transmitter chain (mode 1). The proposed transmitter consists of a low-pass filter, a variable gain amplifier, a voltage-to-current converter, an I/Q up-mixer, a differential-to-single-ended converter, a driver amplifier, and a transmit/receive (T/R) switch. The proposed T/R switch shows an insertion loss of less than 1.5 dB and a Tx/Rx port isolation of more than 27 dB over a 3 GHz to 5 GHz frequency range. All RF/analog circuits have been designed to achieve high linearity and wide bandwidth. The proposed transmitter is implemented using IBM 0.13 ${\mu}m$ CMOS technology. The fabricated transmitter shows a -3 dB bandwidth of 550 MHz at each sub-band center frequency with gain flatness less than 1.5 dB. It also shows a power gain of 0.5 dB, a maximum output power level of 0 dBm, and output IP3 of +9.3 dBm. It consumes a total of 54 mA from a 1.5 V supply.

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유도전동기의 자기등가회로 해석을 위한 시스템 매트릭스 구성 (Formation of System Matrix for analyzing Magnetic Equivalent Circuit of Induction Motor)

  • 최재영;이은웅;정종호;김성종;우성봉
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 추계학술대회 논문집 학회본부 B
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    • pp.330-332
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    • 2000
  • To analyze the transient state of an induction motor, there have been studies for using the magnetic equivalent circuit method(MECD) instead of the time differential finite-element method. MECD which analyzes magnetic equivalent circuits after converting each part of an electric machine into the magnetic circuit elements, has the merits of short calculation-time and comparatively accurate results. To analyze an electric machine with MECM, we have to replace stator and rotor with the magnetic elements and express the air gap, where electromechanical energy conversion takes place, with the permeance. So in this study, to analyze an Induction Motor with HECM, we express the magnetic equivalent circuit as algebraic equations and then as the matrix for solving easily them. In particular, all relations are formed with matrixes to solve Mathematically them in the programming process later. As a result, this theory will be the basis on the static and dynamic analysis of an Induction Motor.

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10-GHz band 2 × 2 phased-array radio frequency receiver with 8-bit linear phase control and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology

  • Seon-Ho Han;Bon-Tae Koo
    • ETRI Journal
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    • 제46권4호
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    • pp.708-715
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    • 2024
  • We propose a 10-GHz 2 × 2 phased-array radio frequency (RF) receiver with an 8-bit linear phase and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology. An 8 × 8 phased-array receiver module is implemented using 16 2 × 2 RF phased-array integrated circuits. The receiver chip has four single-to-differential low-noise amplifier and gain-controlled phase-shifter (GCPS) channels, four channel combiners, and a 50-Ω driver. Using a novel complementary bias technique in a phase-shifting core circuit and an equivalent resistance-controlled resistor-inductor-capacitor load, the GCPS based on vector-sum structure increases the phase resolution with weighting-factor controllability, enabling the vector-sum phase-shifting circuit to require a low current and small area due to its small 1.2-V supply. The 2 × 2 phased-array RF receiver chip has a power gain of 21 dB per channel and a 5.7-dB maximum single-channel noise-figure gain. The chip shows 8-bit phase states with a 2.39° root mean-square (RMS) phase error and a 0.4-dB RMS gain error with a 15-dB gain control range for a 2.5° RMS phase error over the 10 to10.5-GHz band.

IEEE 802.15.4g MR-OFDM SUN 표준을 지원하는 0.18-μm CMOS 기저대역 회로 설계에 관한 연구 (A 0.18-μm CMOS Baseband Circuits for the IEEE 802.15.4g MR-OFDM SUN Standard)

  • 배준우;김창완
    • 한국정보통신학회논문지
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    • 제17권3호
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    • pp.685-690
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    • 2013
  • 본 논문에서는 IEEE 802.15.4g MR-OFDM SUN 시스템에 적용 가능한 4개의 멀티채널 대역폭 및 최대 84 dB 전압이득을 제공할 수 있는 기저대역 수신기를 제안한다. 제안하는 기저대역 수신기는 연산증폭기를 이용한 저항 부궤환 구조의 가변 이득 증폭기 2개와 한 개의 Active-RC 5차 Chebyshev필터, 그리고 한 개의 DC-offset 제거회로로 구성된다. 제안하는 기저대역 수신기는 100 kHz, 200 kHz, 400 kHz, 그리고 600 kHz의 1 dB 다중 채널 차단 주파수를 지원하며, +7 dB에서 +84 dB까지 1 dB 단계로 전압 이득을 제공한다. 또한 제안하는 기저대역 수신기는 DC-offset 제거 회로를 사용함으로써 직접 변환 수신기 구조에서 발생되는 DC-offset 문제를 회피하였다. 모의실험 결과 제안하는 수신기는 최대 차동 신호 $1.5V_{pp}$의 입력 신호를 받아들일 수 있으며, 5 kHz와 500 kHz에서 42 dB, 37.6 dB 노이즈 지수를 각각 제공한다. 제안하는 I/Q기저대역 수신기는 $0.18-{\mu}m$ CMOS 공정으로 설계되었으며, 1.8 V의 전압으로 부터 총 17 mW 전력을 소모한다.

초광대역 통신시스템 응용을 위한 이중채널 6b 1GS/s 0.18um CMOS ADC (A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems)

  • 조영재;유시욱;김영록;이승훈
    • 대한전자공학회논문지SD
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    • 제43권12호
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    • pp.47-54
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    • 2006
  • 본 논문에서는 초광대역 통신시스템 응용을 위한 이중채널 6b 1GS/s A/D 변환기 (ADC)를 제안한다. 제안하는 ADC는 IGS/s의 신호처리속도에서 전력, 칩 면적 및 정확도를 최적화하기 위해 인터폴레이션 기반의 6b 플래시 ADC 회로로 구성되며, 입력 단에 광대역 열린 루프 구조의 트랙-앤-홀드 증폭기를 사용하였으며, 넓은 입력신호범위를 처리하기 위한 이중입력의 차동증폭기와 함께 래치 단에서의 통상적인 킥-백 잡음 최소화기법 등을 적용한 비교기를 제안하였다. 또한, CMOS 기준 전류 및 전압 발생기를 온-칩으로 집적하였으며, 디지털 출력에서는 새로운 버블 오차 교정회로를 제안하였다. 본 논문에서 제안하는 ADC는 0.18um 1P6M CMOS 공정으로 제작되었으며, 1GS/s의 동작속도에서 SNDR 및 SFDR은 각각 최대 30dB, 39dB를 보이며, 측정된 시제품 ADC의 DNL 및 INL은 각각 1.0LSB, 1.3LSB 수준을 보여준다. 제안하는 이중채널 ADC의 칩 면적은 $4.0mm^2$이며, 측정된 소모 전력은 1.8V 전원 전압 및 1GS/s 동작속도에서 594mW이다.

WLAN을 위한 고속 링 발진기를 이용한 5.8 GHz PLL (5.8 GHz PLL using High-Speed Ring Oscillator for WLAN)

  • 김경모;최재형;김삼동;황인석
    • 전자공학회논문지SC
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    • 제45권2호
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    • pp.37-44
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    • 2008
  • 본 논문에서는 고속 링 발진기를 이용한 WLAN용 5.8 GHz PLL을 제안하였다. 제안한 PLL에 사용된 링 발진기는 부 스큐 지연방식을 이용하여 차동 구조로 설계되었다. 따라서 Power-Supply-Injected Noise에 둔감하며, 1/f Noise를 감소시키기 위하여 Tail Current Source를 사용하지 않았다. 제안한 링 발진기는 $0{\sim}1.8V$의 컨트롤 전압에 걸쳐 $5.13{\sim}7.04GHz$의 발진주파수를 보였다. 본 논문에서 제안한 PLL 회로는 0.18 um 1.8 V TSMC CMOS 라이브러리를 기본으로 하여 설계하였고 시뮬레이션을 통하여 성능을 검증하였다. 동작 주파수는 5.8 GHz이며, Locking Time은 2.5 us, 5.8 GHz에서의 소비 전력은 59.9mW로 측정되었다.