• Korean Journal of Optics and Photonics
• /
• v.13 no.3
• /
• pp.215-222
• /
• 2002

Using an in-situ ellipsometer, we monitored the growth curve of optical recording media in real time. For confirmation of the thickness control using in-situ ellipsometry, we analyzed the deposited multi-layer sample made of Ge-Sb-Te alloy film and ZnS-Si0$_2$ dielectric films using an exsitu spectroscopic ellipsometer. The target material in the first sputtering gun is ZnS-SiO$_2$ as the protecting dielectric layer and that in the second gun is Ge$_2$sb$_2$Te$_{5}$ as the receding layer. While depositing ZnS-SiO$_2$, Ge$_2$Sb$_2$Te$_{5}$ and ZnS-SiO$_2$ films on c-Si substrate in sequence, we measured Ψ $\Delta$ in real time. Utilizing the complex refractive indices of Ge$_2$Sb$_2$Te$_{5}$ and ZnS-SiO$_2$ obtained from the analysis of spectroscopic ellipsometry data, the evolution of ellipsometric constants Ψ, $\Delta$ with thickness is calculated. By comparing the calculated evolution curve of ellipsometric constants with the measured one, and by analyzing the effect of density variation of the Ge$_2$Sb$_2$Te$_{5}$ recording layer on ellipsometric constants with thickness, we precisely monitored the growth rate of the Ge-Sb-Te multilayer and controlled the growth process. The deviation of the real thicknesses of Ge-Sb-Te multilayer obtained under the strict monitoring is post confirmed to be less than 1.5% from the target structure of ZnS-SiO$_2$(1400 $\AA$)IGST(200 $\AA$)$\mid$ZnS-SiO$_2$(200$\AA$).(200$\AA$).

• Korean Journal of Materials Research
• /
• v.14 no.10
• /
• pp.731-736
• /
• 2004

Herein, we report on the co-firing of a low-K wiring substrate and a middle-K functional substrate in LTCC. Firstly, we researched the sintering behavior and dielectric properties of the low-k wiring substrate comprised by alumina and glass frit with ${\varepsilon}_r$, of $\sim7$ and the middle-k functional substrate comprised by $Ba_{5}Nb_{4}O_{15}$ and glass frit with ${\varepsilon}_r$, of $20\sim30$. The warpage and delamination between the hetero layers of the low-K and the middle-K composition were also studied. In particular, physical matching of the hetero layers could be possible by adjusting of the sintering properties of the composition. We observed that an introduction of the glass frit to the low- and middle-K substrate gives rise to a minimization of an effect given by separation of the hetero layers, and modification of the fraction of the glass frit accompanied by a variation of the composition could control the sintering behavior and its beginning temperature. In the case of co-firing of the L03 as the low-K wiring substrate composition and the M03 as the middle-K functional substrate composition at $875^{\circ}C$, we could fabricate a desirable structure of hetero layers without any kinds of structural defects such as separation, warpage, delamination, pore trap, etc. We suppose that the co-firing techniques described in this study would provide a helpful method to fabricate a LTCC multi-functional for the next generation.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.20 no.6
• /
• pp.278-282
• /
• 2010

The doping effect of thulium on electrical properties and degradation behavior in barium titanate ceramics ($BaTiO_3$) was investigated in terms of generations of core-shell structure and micro-chemical changes through highly accelerated degradation test. The dielectric specimens of pellet type and multi-layered sheets were prepared by using $BaTiO_3$ with undoped and doped with 1 mol% $Tm_2O_3$. The $BaTiO_3$ ceramics doped with 1 mol% $Tm_2O_3$ had 40% higher dielectric constant (${\varepsilon}$ = 2700) than that of the undoped $BaTiO_3$ specimen at curie temperature and met X7R specification. According to the result of highly accelerated degradation test conducted at $150^{\circ}C$, 70 V, and 24 hr, the oxygen diffusion was declined in dielectrics doped with 1 mol% $Tm_2O_3$. The $Tm^{3+}$ ion substituted selectively Ba site and Ti site and contributed to the generation of the core-shell structure. Oxygen vacancies occurred by substitution for Ti site could reduce excess oxygen that reacted to the Ni electrode.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.34 no.2
• /
• pp.245-253
• /
• 2010

The reliability problems of flip chip packages subjected to temperature change during the packaging process mainly occur due to mismatches in the coefficients of thermal expansion as well as features with time-dependent material properties. Resin molding compounds like glass fiber reinforced epoxy composites used as the dielectric layer in printed circuit boards (PCB) strongly exhibit viscoelastic behavior, which causes their Young's moduli to not only be temperature-dependent but also time-dependent. In this study, the stress relaxation and creep tests were used to characterize the viscoelastic properties of the glass fiber reinforced epoxy composite. Using the viscoelastic properties, finite element analysis (FEA) was employed to simulate thermal loading in the pre-baking process and predict thermal warpage. Furthermore, the effect of viscoelastic features for the major polymeric material on the dielectric layer in the PCB (the glass fiber reinforced epoxy composite) was investigated using FEA.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.08a
• /
• pp.176-176
• /
• 2010

One of the critical issues for applications of flexible organic thin film transistors (OTFTs) for flexible electronic systems is the electrical stabilities of the OTFT devices, including variation of the current on/off ratio (Ion/Ioff), leakage current, threshold voltage, and hysteresis under repetitive mechanical deformation. In particular, repetitive mechanical deformation accelerates the degradation of device performance at the ambient environment. In this work, electrical stability of the pentacene organic thin film transistors (OTFTs) employing multi-stack hybrid encapsulation layers was investigated under mechanical cyclic bending. Flexible bottom-gated pentacene-based OTFTs fabricated on flexible polyimide substrate with poly-4-vinyl phenol (PVP) dielectric as a gate dielectric were encapsulated by the plasma-deposited organic layer and atomic-layer-deposited inorganic layer. For cyclic bending experiment of flexible OTFTs, the devices were cyclically bent up to 105 times with 5mm bending radius. In the most of the devices after 105 times of bending cycles, the off-current of the OTFT with no encapsulation layers was quickly increased due to increases in the conductivity of the pentacene caused by doping effects from $O_2$ and $H_2O$ in the atmosphere, which leads to decrease in the Ion/Ioff and increase in the hysteresis. With encapsulation layers, however, the electrical stabilities of the OTFTs were improved significantly. In particular, the OTFTs with multi-stack hybrid encapsulation layer showed the best electrical stabilities up to the bending cycles of $10^5$ times compared to the devices with single organic encapsulation layer. Changes in electrical properties of cyclically bent OTFTs with encapsulation layers will be discussed in detail.

• Journal of the Korean Vacuum Society
• /
• v.2 no.2
• /
• pp.188-198
• /
• 1993

We have developed a technique for growing thin oxides (6~10 nm) by the Last step TCA method. N-channel metal-oxide-semiconductor (n-MOS) capacitor and n-channel metal-oxide-semiconductor field-effect transistor's (MOSFET's) having a gate oxide with chlorine incorporated $SiO_2/Si$ interface have been analyzed by electrical measurements and physical methods, such as secondary ion mass spectrometry (SIMS) and electron spectroscopy for chemical analysis (ESCA). The gate oxide grown with the Last strp TCA method has good characteristics as follows: the electron mobility of the MOSFET's with the Last step TCA method was increased by about 7% and the defect density at the $SiO_2/Si$ interface decreases slightly compared with that with No TCA method. In reliability estimation, the breakdown field was 18 MV/cm, 0.6 MV/cm higher than that of the gate oxide with No TCA method, and the lifetime estimated by TDDB measurement was longer than 20 years. The device lifetime estimated from hot-carrier reliability was proven to be enhanced. As the results, the gate oxide having a $SiO_2/Si$ interface incorporated with chlorine has good characteristics. Our new technique of Last step TCA method may be used to improve the endurance and retention of MOSFET's and to alleviate the degradation of thin oxides in short-channel MOS devices.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2002.11a
• /
• pp.477-480
• /
• 2002

Si-O-C(-H) thin film with a tow dielectric constant were deposited on a P-type Si(100) substrate by an inductively coupled plasma chemical vapor deposition (ICPCVD). Bis-trimethylsilymethane (BTMSM, H$_{9}$C$_3$-Si-CH$_2$-Si-C$_3$H$_{9}$) and oxygen gas were used as Precursor. Hybrid type Si-O-C(-H) thin films with organic material have been generated many voids after annealing. Consequently, the Si-O-C(-H) films can be made a low dielectric material by the effect of void. The surface characterization of Si-O-C(-H) thin films were performed by SEM(scanning electron microscope). The characteristic analysis of Si-O-C(-H) thin films were performed by X-ray photoelectron spectroscopy (XPS).

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.406-406
• /
• 2010

일반적으로, 나노스케일의 MOS 소자에서는 게이트 절연체 두께가 감소함에 따라 tunneling effect의 증가로 인해 PID (plasma induced damage)로 인한 소자 특성 저하 현상을 감소하는 추세로 알려져 있다. 하지만 요즘 많이 사용되고 있는 high-k 게이트 절연체의 경우에는 오히려 더 많은 charge들이 trapping 되면서 PID가 오히려 더 심각해지는 현상이 나타나고 있다. 이러한 high-k 게이트 식각 시 현재는 주로 Hf-based wet etch나 dry etch가 사용되고 있지만 gate edge 영역에서 high-k 게이트 절연체의 undercut 현상이나 PID에 의한 소자특성 저하가 보고되고 있다. 본 연구에서는 이에 차세대 MOS 소자의 gate stack 구조중 issue화 되고 있는 metal gate 층과 gate dielectric 층의 식각공정에 각각 중성빔 식각과 중성빔 원자층 식각을 적용하여 전기적 손상 없이 원자레벨의 정확한 식각 조절을 해줄 수 있는 새로운 two step 식각 공정에 대한 연구를 진행하였다. 먼저 TiN metal gate 층의 식각을 위해 HBr과 $Cl_2$ 혼합가스를 사용한 중성빔 식각기술을 적용하여 100 eV 이하의 에너지 조건에서 하부층인 $HfO_2$와 거의 무한대의 식각 선택비를 얻었다. 하지만 100 eV 조건에서는 낮은 에너지에 의한 빔 스케터링으로 실제 패턴 식각시 etch foot이 발생되는 현상이 관찰되었으며, 이를 해결하기 위하여 먼저 높은 에너지로 식각을 진행하고 $HfO_2$와의 계면 근처에서 100 eV로 식각을 해주는 two step 방법을 사용하였다. 그 결과 anistropic 하고 하부층에 etch stop된 식각 형상을 관찰할 수 있었다. 다음으로 3.5nm의 매우 얇은 $HfO_2$ gate dielectric 층의 정확한 식각 깊이 조절을 위해 $BCl_3$와 Ar 가스를 이용한 중성빔 원자층 식각기술을 적용하여 $1.2\;{\AA}$/cycle의 단일막 식각 조건을 확립하고 약 30 cycle 공정시 3.5nm 두께의 $HfO_2$ 층이 완벽히 제거됨을 관찰할 수 있었다. 뿐만 아니라, vertical 한 식각 형상 및 향상된 표면 roughness를 transmission electron microscope(TEM)과 atomic force microscope (AFM)으로 관찰할 수 있었다. 이러한 중성빔 식각과 중성빔 원자층 식각기술이 결합된 새로운 gate recess 공정을 실제 MOSFET 소자에 적용하여 기존 식각 방법으로 제작된 소자 결과를 비교해 본 결과 gate leakage current가 약 one order 정도 개선되었음을 확인할 수 있었다.

• Korean Journal of Materials Research
• /
• v.7 no.3
• /
• pp.196-202
• /
• 1997

Perovskite lanthanum doped lead titanate ($(Pb,La)TiO_{3}$ or PLT) thin films were successfully fabricated on Pt/TijSiO.iSi substrates at the temperatures as low as $440~500^{\circ}C$ by eleclron cyclotron resonance plasma-enhanced chemical vapor deposition (ECR PECVII). Since the volatilities of the MC sources arid oxide molecules (especially Ph oxide) increased with increasing deposition temperature, the film deposition rate and the (I'b + La)/'Ti ratio decreased Stoichiometric perovskite PL'T films with good dielectric and leakeage current properties were obtained at the temperatures of $460~480^{\circ}C$. The lanthanum content of the film was nearly directly propotional to $La(DPM)_{3}$ flow rate. As the La/Ti ratio increased from 3.0 to 9.5%, the dielectric constant increased from 360 to 650 and the leakeage current density at 100kV/cm electric field decreased from $4{\times}10^{-5}$ to $4{\times}10_{-8}A/cm^2$.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.7
• /
• pp.102-108
• /
• 2013

In manufacturing of solution-processed organic electronic devices, a spin coating method is frequently used, but which has a big problem. Solvent in a solution has a decisive effect such as physical and chemical damage for successive solution-based film deposition. Such a severe damage by solvent restricts for fabricating building blocks of multi-layered films from solutions. In this work, it will be shown that a proper combination of well-known solvents gives a chance to fabricate multi-layered film, also this new method was applied to make organic field effect transistor. Two types of bottom gate, bottom contact transistors were fabricated, one of which is fabricated by conventional single spin coating method, the other fabricated by double spin coating method. Compared with the electrical characteristics in a single spin coated transistor, the leakage current between source and gate electrode was decreased, ON state current was increased, and the extracted saturation mobility was multiplied more than 2.7 time for double spin coated transistors. It is suggested that the multiple coated gate dielectric structure is more desirable for high performance organic ferroelectric field effect transistors.