• 전자공학회논문지A
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• 제31A권9호
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• pp.1-9
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• 1994

Through the low orbit GPS satellite for a 3-dimensional real time position detechtion can be achieved anywhere. Utilizing the GPS sate llite detection values an analysis of the varing characteristics of the ionosphere can be achieved, and by calculating the correlation relationship of the position detection error and the ionospheric time delay characteristics, an advanced algorithm technique can be developed. Computer simulation of the developed algorithm for defining the corelation between the position detection error and the varing ionospheric time delay charcteristics has been proceeded. The results of simulation reveal the fact that the varing characteristics of the ionosphere nearly match the actual ionospheric time delay characteristics.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제16권12호
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• pp.4099-4113
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• 2022

In this paper, we propose improved maximum access delay time, noise variance, and power delay profile (PDP) estimation schemes for orthogonal frequency division multiplexing (OFDM) system in multipath fading channels. To this end, we adopt the approximate maximum likelihood (ML) estimation strategy. For the first step, the log-likelihood function (LLF) of the received OFDM symbols is derived by utilizing only the cyclic redundancy induced by cyclic prefix (CP) without additional information. Then, the set of the initial path powers is sub-optimally obtained to maximize the derived LLF. In the second step, we can select a subset of the initial path power set, i.e. the maximum access delay time, so as to maximize the modified LLF. Through numerical simulations, the benefit of the proposed method is verified by comparison with the existing methods in terms of normalized mean square error, erroneous detection, and good detection probabilities.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2002년도 추계학술대회 발표 논문집
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• pp.130-136
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• 2002

Device makers want to make higher density chips as devices shrink, especially WSix poly stack down is one of the key issues. However, EPD (End Point Detection) time delay was happened in DPS+ poly chamber which is a barrier to achieve device shrink because EPD time delay killed test pattern and next generation device. To investigate the EPD time delay, a test was done with patterned wafers. This experimental was carried out combined with OES(Optical Emission Spectroscopy) and SEM (Scanning Electron Microscopy). OES was used to find corrected wavelength in WSix stack down gate etching. SEM was used to confirm WSix gate profile and gate oxide damage. Through the experiment, a new wavelength (252nm) line of plasma is selected for DPS+ chamber to call correct EPD in WSix stack down gate etching for current device and next generation device.

• 전자공학회논문지S
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• 제35S권5호
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• pp.48-58
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• 1998

In this paper, we proposed a new algorithm using characteristics of th ereconstructed phase trajectory by topological mapping developed for a real-tiem detection of the QRS complexes of ECG signals. Using fill-factor algorithm and mutual information algorithm which are in genral used to find out the chaotic characteristics of sampled signals, we inferred the proper mapping parameter, time delay, in ECG signals and investigated QRS detection rates with varying time delay in QRS complex detection. And we compared experimental time dealy with the theoretical one. As a result, it shows that the experimental time dealy which is proper in topological mapping from ECG signals is 20ms and theoretical time delays of fill-factor algorithm and mutual information algorithm are 20.+-.0.76ms and 28.+-.3.51ms, respectively. From these results, we could easily infer that the fill-factor algorithm in topological mapping from one-dimensional sampled ECG signals to two-dimensional vectors, is a useful algorithm for the detemination of the proper ECG signals to two-dimensional vectors, is a useful algorithm for the detemination of the proper time delay. Also with the proposed algorithm which is very simple and robust to low-frequency noise as like baseline wandering, we could detect QRS complex in real-time by simplifying preprocessing stages. For the evaluation, we implemented the proposed algorithm in C-language and applied the MIT/BIH arrhythmia database of 48 patients. The proposed algorithm provides a good performance, a 99.58% detection rate.

• 한국전기전자재료학회논문지
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• 제18권3호
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• pp.206-211
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• 2005

The device makers want to make higher density chips on the wafer through scale-down. The change of WSix/poly-Si gate film thickness is one of the key issues under 100 nm device structure. As a new device etching process is applied, end point detection(EPD) time delay was occurred in DPS+ poly chamber of Applied Materials. This is a barrier of device shrink because EPD time delay made physical damage on the surface of gate oxide. To investigate the EPD time delay, the experimental test combined with OES(Optical Emission Spectroscopy) and SEM(Scanning Electron Microscopy) was performed using patterned wafers. As a result, a EPD delay time is reduced by a new chamber seasoning and a new wavelength line through plasma scan. Applying a new wavelength of 252 nm makes it successful to call corrected EPD in WSix/poly-Si stack-down gate etching in the DPS+ poly chamber for the current and next generation devices.

• Journal of Electrical Engineering and Technology
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• 제9권1호
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• pp.313-323
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• 2014

Sensor fault detection and isolation problems subject to H_/$H_{\infty}$, performance are concerned for linear time-invariant systems with time delay in a state and parametric uncertainties. To that end, a model-based observer bank approach is pursued. The design conditions for both continuous- and discrete-time cases are formulated in terms of matrix inequalities, which are then converted to the problems solvable via an algorithm involving convex optimization.

• 한국멀티미디어학회논문지
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• 제6권5호
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• pp.778-787
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• 2003

기존의 규칙기반 침입탐지 시스템은 사후처리식 규칙 추가로 인하여 새로운 변종의 공격을 탐지하지 못한다. 본 논문에서는 규칙기반 시스템의 한계점을 극복하기 위하여, 시간지연 신경망(Time Delay Neural Network; 이하 TDNN) 침입탐지 시스템을 제안한다. 네트워크상의 패킷은 바이트 단위를 하나의 픽셀로 하는 0에서 255사이 값으로 이루어진 그레이 이미 지로 볼 수 있다. 이러한 연속된 패킷이미지를 시간지연신경망의 학습패턴으로 사용한다. 정상적인 흐름과 비정상적인 흐름에 대한 패킷이미지를 학습하여 두 가지 클래스에 대한 신경망 분류기를 구현한다 개발하는 침입탐지 시스템은 알려진 다양한 침입유형뿐만 아니라, 새로운 변종에 대해서도 분류기의 유연한 반응을 통하여 효과적으로 탐지할 수 있다.

• 한국전자파학회지:전자파기술
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• 제5권1호
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• pp.40-50
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• 1994

자신이 위치를 파악하는 전자항해 시스템 중에서도 저궤도 위성인 GPS 위성을 이용한 위치측정 방식은 지구상 어느곳에서 언제든지 고정밀 3차원의 전천후 실시간 위치측정이 가능한 방식이다. 이 GPS위성의 전파가 통과하게 되는 전리층의 변화를 분석하기 위하여 전리층 변동에 다른 현상을 관측하여 GPS 위성에 의한 위치 측정 오차와 전리층 변화와의 관계를 모델링 하여 임의의 지역에서의 GPS 수신기에 의한 실제의 샘플 데이타를 사용하여 시간, 양각, 방위각 등을 변화시켜 가면서 컴퓨터 시뮬레이션을 통하여 성능을 비교 분석하였다 실험결과 제안한 단일 주파수 GPS 사용자일 경우에 전리층 시간지연은 어느정도의 오차가 존재하지만 실제 실험에의한 시간지연이 5~6nsec이고 본 논문에서의 결과가 상태가 양호한 경우에는 5~7nxec정도까지 근접함을 알 수 있었다. 이것은 본논문에서의 전리층 전파특성 알고리듬이 실제 실험 결과치와 근하하게 일치함을 나타낸다.

• 전기전자학회논문지
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• 제27권3호
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• pp.234-238
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• 2023

본 논문에서는 PVT(process, voltage, and temperature) 변화에 대한 보상기능을 가지는 시간-디지털 변환기(time-to-digital converter : TDC)를 제안한다. 일반적인 지연 라인(delay line) 기반의 TDC는 인버터의 전파 지연을 기반으로 시간을 측정하기 때문에 근본적으로 PVT 변화에 민감하다. 이 논문은 PVT 변화에 의한 전파 지연을 보상하여 TDC의 해상도 변화를 최소화시키는 방법을 제안한다. 또한 넓은 입력 측정 범위(detection range)를 갖기 위해 Cyclic Vernier TDC (CVTDC) 구조를 채택한다. 제안하는 PVT보상 기능의 CVTDC는 45nm CMOS 공정으로 설계되어, 8mW의 전력을 소모하며, 5 ps의 TDC 해상도 및 약 5.1 ns 입력 측정 범위를 갖는다.

• Journal of Electrical Engineering and Technology
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• 제8권6호
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• pp.1283-1295
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• 2013

This study proposed an improvement in synchronously rotating reference frame-based voltage sag detection under distorted grid voltages. In the past, the conventional synchronously rotating reference frame (CSRRF)-based voltage sag detection was generally used in the voltage sag compensation applications. Its disadvantage is a long delay of detection time. The modified synchronously rotating reference frame (MSRRF)-based voltage sag detection is able to detect the voltage sag with only a short delay in detection time. However, its operation under distorted grid voltage conditions is unavailable. This paper proposed the improvement of modified synchronously rotating reference frame (IMSRRF)-based voltage sag detection for use in distorted grid voltages with very fast operation of voltage sag detection. The operation of the proposed voltage sag detections is investigated via simulations and experimentations to verify the performance of the IMSRRF-based voltage sag detection.