• 제목/요약/키워드: density-delay time

검색결과 139건 처리시간 0.022초

FPGA에서 시간구동 최적화의 배치.배선에 관한 연구 (A Study on Place and Route of Time Driven Optimization in the FPGA)

  • Kim, Hyeonho;Lee, Yonghui;Cheonhee Yi
    • 한국정보과학회:학술대회논문집
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    • 한국정보과학회 2003년도 봄 학술발표논문집 Vol.30 No.1 (B)
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    • pp.283-285
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    • 2003
  • We have developed an optimization algorithm based formulation for performing efficient time driven simultaneous place and route for FPGAS. Field programmable gate array(FPGAS) provide of drastically reducing the turn-around time for digital ICs, with a relatively small degradation in performance. For a variety of application specific Integrated circuit application, where time-to-market is most critical and the performance requirement do not mandate a custom or semicustom approach, FPGAS are an increasingly popular alternative. This has prompted a substantial amount of specialized synthesis and layout research focused on maximizing density, minimizing delay, and minimizing design time.

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고밀도 디스크 드라이브의 안착시간 최소화 제어 (Control For Minimizing Settling Time in High-Density Disk Drives)

  • 강창익;김창환;임충혁
    • 제어로봇시스템학회논문지
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    • 제9권1호
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    • pp.10-21
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    • 2003
  • During seek operation in disk drives, the recording head is moved toward desired track by seek servo controller and then is settled onto the center of the desired track by settling servo controller. If the head speed at the start of settling servo control is not slow, it may produce overshoot relative to the center of track and thus extend the settling time. The degradation in settling performance will be more severe as the track width becomes smaller for higher density of data storage. We design a new settling servo controller for minimizing settling time based on the pole-zero cancellation. In order to cancel slow poles in settling response, we apply discrete pulse signals to the system in addition to the state feedback control. For exact pole-zero cancellation, we consider the dynamics of power amplifier used for actuator current regulation and the effects of delay in control action. In addition, we present system parameter identification algerian for the robustness of our controller to system parameter variation. In order to demonstrate the practical use of our controller, we present experimental results obtained by using a commercially available disk drive.

A Study on Directed Technology Mapping for FPGA

  • Kim, Hyeon-Ho;Lee,Yong-Hui;Yi, Jae-Young;Woo, Kyong-Hwan;Yi, Cheon-Hee
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.1161-1164
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    • 2003
  • We have developed an optimization algorithm based formulation for performing efficient time driven simultaneous place and route for FPGAs. Field programmable gate array(FPGAs) provide of drastically reducing the turn-around time for digital ICs, with a relatively small degradation in performance. For a variety of application specific integrated circuit application, where time-to-market is most critical and the performance requirement do not mandate a custom or semicustom approach, FPGAs are an increasingly popular alternative. This has prompted a substantial amount of specialized synthesis and layout research focused on maximizing density, minimizing delay, and minimizing design time.

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면적과 지연 시간을 고려한 CLB 구조의 CPLD 저전력 기술 매핑 알고리즘 (A CLB based CPLD Low-power Technology Mapping Algorithm consider Area and Delay time)

  • 김재진;조남경;전종식;김희석
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.1169-1172
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    • 2003
  • In this paper, a CLB-based CPLD low-power technology mapping algorithm consider area and delay time is proposed. To perform low power technology mapping for CPLD, a given Boolean network have to be represented to DAG. The proposed algorithm are consist of three step. In the first step, TD(Transition Density) calculation have to be performed. In the second step, the feasible clusters are generated by considering the following conditions: the number of output, the number of input and the number of OR-terms for CLB(Common Logic Block) within a CPLD. The common node cluster merging method, the node separation method, and the node duplication method are used to produce the feasible clusters. In the final step, low power technology mapping based on the CLBs is packing the feasible clusters into the several proper CLBs. The proposed algorithm is examined by using benchmarks in SIS. In the case of that the number of OR-terms is 5, the experiments results show that reduce the power consumption by 30.73% comparing with that of TEMPLA, and 17.11% comparing with that of PLAmap respectively.

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공기흡입형 연기감지장치에 관한 연구 (The Study of Air Sampling Smoke Detector)

  • 이복영;이병곤
    • 한국화재소방학회논문지
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    • 제17권4호
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    • pp.86-91
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    • 2003
  • 공기조화설비가 설치된 감시공간에서의 화재 시 열$.$연기기류의 유동형상은 정상 유동해석과 다른 기류 유동형상을 나타내어 화재감지기의 응답특성지연 해결 및 연기감지농도를 향상, 화재초기에 경보를 발생하여 인명피해 및 재산피해를 최소화하기 위한 성능위주의 화재감지장치 개발을 위한 필요성에 의해 연구를 수행하였다. 본 연구는 높은 연기응답특성을 가지며 공기순환에 의한 응답특성지연에 영향을 받지 않는 능동형태의 연기감지장치로서 감시공간의 공기를 공기흡입관을 통하여 연기농도 분석장치로 흡입하여 연기를 감지하는 공기흡입형 광전식 연기감지장치 개발에 필요한 연기농도 분석기술 및 공기흡입관을 통한 균등 공기흡입기술에 대하여 수행하였다. 연구결과, 공기흡입배관에 설치된 흡입구를 통한 공기흡입이 균등하게 이루어져 균일한 감도특성을 나타내어 공기순환에 의한 연기감지의 지연에 영향을 받지 않으며 연기감지성능은 수동형태의 연기감지기보다 우수한 응답특성을 나타내었다.

공간 회귀분석을 활용한 긴급차량 출동 지연요소의 우선순위 도출 - 서울시를 중심으로 - (Deriving the Priority of Emergency Vehicle Dispatch Delay Factors Using Spatial Regression Analysis - Focusing on Seoul -)

  • 박준상;이수빈;김정옥
    • 지적과 국토정보
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    • 제53권2호
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    • pp.67-77
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    • 2023
  • 도시가 과밀화, 집중화됨에 따라 도시민의 생활수준 향상으로 공공서비스에 대한 수요가 지속적으로 증가하고 있다. 그중 소방서비스는 응급상황에서의 사고로 인한 피해를 줄이고 도시민의 의료서비스 접근성 향상에 영향을 미쳐 중요한 공공서비스 중 하나라고 볼 수 있다. 골든타임 내 환자 및 의료기관의 신속한 이동과 적절한 응급처치는 응급상황 시 필수적인 요소로 서울은 약 1천만 명의 인구가 거주하는 초대형 도시로 응급의료 환자가 매우 많은 지역이다. 이에 본 연구는 골든타임 확보를 위해 공간회귀분석을 활용하여 서울시의 응급차 출동 지연요인에 영향을 미치는 요인을 살펴보고, 관리 우선순위를 도출하여 응급차 출동 지연요인 관리에 대한 시사점을 제시하였다. 주요 분석 결과 긴급차 출동 시간은 토지이용 특성이 가장 영향력이 큰 요인으로 나타났으며, 토지이용 혼합도, 상업지역 밀도, 평균 환자 연령, 평균 도로길이 순으로 응급차 출동 시간에 영향을 미치는 것으로 나타났다. 본 연구는 응급차 출동 지연요인의 정확한 이해와 우선순위에 따른 대응방안 마련을 위한 중요한 기초자료로 활용될 수 있을 것이다.

LII/LIS 기법을 이용한 층류확산화염 매연입자의 정량화 (Quantitative Measurements of Soot Particles in a Laminar Diffusion Flame Using a LII/LIS Technique)

  • 정재우;이원남;한용택;김병수;이춘범;김덕진;이기형
    • 한국연소학회:학술대회논문집
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    • 한국연소학회 2002년도 제25회 KOSCI SYMPOSIUM 논문집
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    • pp.113-121
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    • 2002
  • The distribution of volume fraction, mean diameter and number density of soot particles are measured quantitatively in a co-flow ethylene diffusion flame using a simultaneous LII/LIS measurement technique. The LII/LIS system and the measured values are, respectively, calibrated and evaluated by comparing to the informations obtained from laser light. extinction/scattering experiments, LII signal shows some sensitivity to the laser light intensity when laser power density exceeds a certain value(threshold). It is also found that there is an optimal laser intensity and a delay time in order to obtain the best result using the simultaneous LII/LIS measurement technique.

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온도변화에 따른 HEMT의 DC 특성 연구 (Temperature dependency of dc Characteristics for HEMTs)

  • 김진욱;황광철;이동균;안형근;한득영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 하계학술대회 논문집
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    • pp.29-32
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    • 2000
  • In this paper, an analytical model for I-V characteristics of a HEMTs is Proposed. The developed model takes into account the temperature dependence of drain current. In high-speed ICs for optical communication systems and mobile communication systems, temperature variation affects performance; for example the gain, efficiency in analog circuits and the delay time, power consumption and noise mrgin in digital circuits. To design such a circuit taking into account the temperature dependence of the current-voltage characteristic is indispensible. This model based on the analytical relation between surface carrier density and Fermi potential including temperature dependent coefficients.

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저가(低價), 고(高) 밀도(密度)의 자려식 DC/DC 컨버터에 관한 연구 (A Study on a Self Oscillating DC/DC Converter with Low Cost, High Power Density)

  • 백주원;유동욱;오성철;위계조;김명한
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.860-862
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    • 1993
  • This paper presents a study on a self oscillating dc/dc converter with low cost, high power density. This converter only consists of power filter, switch and comparater and time delay reduction parts. But it has better characteristics than the conventional self-oscillating dc/dc converter. And it can be made by a few devices and can be smaller size. These type of converters find their applications in many industrial equipments. And the performances of the proposed system are verified through expriment.

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건설폐목을 이용한 목질계보드의 시멘트응결 특성에 관한 실험적 연구 (An Experimental Study for Cement Setting Property of Wood Chip Board Using Construction Waste Wood)

  • 김세환;오세출
    • 한국건설순환자원학회논문집
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    • 제3권1호
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    • pp.80-86
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    • 2007
  • In this study we experimented setting time and basic properties as waste wood fiber and sodium silicate substitution rate to reuse waste wood fiber produced in construction field to wood chip board. To do this construction waste woods were crushed with the size less than 10mm, mixed with the rate of 1:2, 2.5, 3, and added sodium silicate with the rate of 0, 5% of cement content. The results are as follows. As the substitution rate of construction waste wood was increased delay of setting time was also increased, and the batch of adding 5% accelerator had a 13~17 hours faster setting time than non accelerator batch. The compressive strength was lower as wood substitution rate was higher, and as the specific gravity was higher, the strength was also higher. As wood substitution rate was higher, heat conductivity was lower, and as specific gravity was higher, heat conductivity also was higher.

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