• Title/Summary/Keyword: demodulation

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Design and Implementation of the Channel Adaptive Broadband MODEM (채널 적응형 광대역 모뎀 설계 및 구현)

  • Chang, Dae-Ig;Kim, Nae-Soo
    • The KIPS Transactions:PartC
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    • v.11C no.1
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    • pp.141-148
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    • 2004
  • Recently, the demand of broadband communications such as high-speed internet, HDTV, 3D-HDTV and ATM backbone network has been increased drastically. For transmitting the broad-bandwidth data using wireless network, it is needed to use ka-band frequency. However, the use of this ka-band frequency is seriously affected to the received data performance by rain fading and atmospheric propagation loss at the Ka-band satellite communication link. So, we need adaptive MODEM to endure the degraded performance by channel environment. In this paper, we will present the structure and design of the 155Mbps adaptive Modem adaptively compensated against channel environment. In order to compensate the rain attenuation over the ka-band wireless channel link, the adaptive coding schemes with variable coding rates and the multiple modulation schemes such as trellis coded 8-PSK, QPSK, and BPSK are adopted. And the blind demodulation scheme is proposed to demodulate without Information of modulation mode at the multi-mode demodulator, and the fast phase ambiguity resolving scheme is proposed. The design and simulation results of adaptive Modem by SPW model are provided. This 155Mbps adaptive MODEM was designed and implemented by single ASIC chip with the $0.25\mu{m}$ CMOS standard cell technology and 950 thousand gates.

New Decision Rules for UWB Synchronization (UWB 동기화를 위한 새로운 결정 법칙들)

  • Chong, Da-Hae;Lee, Young-Yoon;Ahn, Sang-Ho;Lee, Eui-Hyoung;Yoo, Seung-Hwan;Yoon, Seok-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.2C
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    • pp.192-199
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    • 2008
  • In ultra-wideband (UWB) systems, conventionally, the synchronization is to align time phases of a locally generated template and any of multipath components to within an allowable range. However, the synchronization with a low-power multipath component could incur significant performance degradation in receiver operation (e.g., detection) after the synchronization. On the other hand, the synchronization with a high-power multipath component can improve the performance in receiver operation after the synchronization. Generally, the first one among multipath components has the largest power. Thus, the synchronization with the first path component can make better performance than that with low-power component in receiver operation after the synchronization, Based on which, we first propose an optimal decision rule based on a maximum likelihood (ML) approach, and then, develope a simpler suboptimal decision rule for selecting the first path component. Simulation results show that the system has good demodulation performance, which uses new synchronization definition and the proposed decision rules have better performance than that of the conventional decision rule in UWB multipath channels. Between macroblocks in the previous and the current frame. On video samples with high motion and scene change cases, experimental results show that (1) the proposed algorithm adapts the encoded bitstream to limited channel capacity, while existing algorithms abruptly excess the limit bit rate; (2) the proposed algorithm improves picture quality with $0.4{\sim}0.9$dB in average.

A Study on Estimation of a Beat Spectrum in a FMCW Radar (FMCW 레이다에서의 비트 스펙트럼 추정에 관한 연구)

  • Lee, Jong-Gil
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2511-2517
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    • 2009
  • Recently, a FMCW radar is used for the various purposes in the short range detection and tracking of targets. The main advantages of a FMCWradar are the comparative simplicity of implementation and the low peak power transmission characterizing the very low probability of signal interception. Since it uses the frequency modulated continuous wave for transmission and demodulation, the received beat frequency represents the range and Doppler information of targets. Detection and extraction of useful information from targets are performed in this beat frequency domain. Therefore, the resolution and accuracy in the estimation of a beat spectrum are very important. However, using the conventional FFT estimation method, the high resolution spectrum estimation with a low sidelobe level is not possible if the acquisition time is very short in receiving target echoes. This kind of problems deteriorates the detection performance of adjacent targets having the large magnitude differences in return echoes and also degrades the reliability of the extracted information. Therefore, in this paper, the model parameter estimation methods such as autoregressive and eigenvector spectrum estimation are applied to mitigate these problems. Also, simulation results are compared and analyzed for further improvement.

A Design of Memory-efficient 2k/8k FFT/IFFT Processor using R4SDF/R4SDC Hybrid Structure (R4SDF/R4SDC Hybrid 구조를 이용한 메모리 효율적인 2k/8k FFT/IFFT 프로세서 설계)

  • 신경욱
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.2
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    • pp.430-439
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    • 2004
  • This paper describes a design of 8192/2048-point FFT/IFFT processor (CFFT8k2k), which performs multi-carrier modulation/demodulation in OFDM-based DVB-T receiver. Since a large size FFT requires a large buffer memory, two design techniques are considered to achieve memory-efficient implementation of 8192-point FFT/IFFT. A hybrid structure, which is composed of radix-4 single-path delay feedback (R4SDF) and radix-4 single-path delay commutator (R4SDC), reduces its memory by 20% compared to R4SDC structure. In addition, a memory reduction of about 24% is achieved by a novel two-step convergent block floating-point scaling. As a result, it requires only 57% of memory used in conventional design, reducing chip area and power consumption. The CFFT8k2k core is designed in Verilog-HDL, and has about 102,000 Bates, RAM of 292k bits, and ROM of 39k bits. Using gate-level netlist with SDF which is synthesized using a $0.25-{\um}m$ CMOS library, timing simulation show that it can safely operate with 50-MHz clock at 2.5-V supply, resulting that a 8192-point FFT/IFFT can be computed every 164-${\mu}\textrm{s}$. The functionality of the core is fully verified by FPGA implementation, and the average SQNR of 60-㏈ is achieved.

Optimum Rake Processing for Multipath Fading in Direct-Sequence Spread-Spectrum Communication Systems (주파수대역 직접확산 통신시스템에서 다중경로 페이딩 보상을 위한 최적 레이크 신호처리에 관한 연구)

  • 장원석;이재천
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.10C
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    • pp.995-1006
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    • 2003
  • It is well know that in the wireless communication systems the transmitted signals can suffer from multipath fading due to the wave propagation characteristics and the obstacles over the paths, resulting in serious reduction in the power of the received signals. However, it is possible to take advantage of the inherent diversity imposed in the multipath reception if the underlying channel can be properly estimated. One of the diversity reception methods in this case is Rake processing. In this paper we study the Rake receivers for the direct-sequence spread-spectrum communication systems utilizing PN (pseudo noise) sequences to achieve spread spectrum. A conventional Rake receiver can use the finite-duration impulse (FIR) filter followed by the PN sequence demodulator, where the FIR filter coefficients are the reverse-ordered complex conjugate values of the fading channel impulse response estimates. Here, we propose a new Rake processing method by replacing the aforementioned PN code sequence with a new set of optimum demodulator coefficients. More specifically, the concept of the new optimum Rake processing is first introduced and then the optimum demodulator coefficients are theoretically derived. The performance obtained using the new optimum Rake processing is also calculated. The analytical results are verified by computer simulation. As a result, it is shown that the new optimum Rake processing method improves the MSE performance more than 10 dB over the conventional one using the fixed PN sequence demodulator. It is also shown that the new optimum Rake processing method improves the MSE performance about 10 dB over the Adaptive Correlator that performs the combining of the multipath components and PN demodulation concurrently. And finally, the MSE performance of the optimum Rake demodulator is very close to the MSE performance of OPSK demodulator under the AWGN channel.

A Study on the Development of SSB Modem (디지털 SSB 모뎀 개발에 관한 연구)

  • Kim, Jeong-Nyun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.10
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    • pp.1852-1857
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    • 2007
  • The SSB modem performs the modulation process which converts the digital voltage level to the audible frequency band signal and the demodulation process which converts reversely the audible frequency signal to the digital voltage level. The modulator and the demodulator are implemented with a single DSP chip. Because of the SSB specific character, the distortion occurs when the frequency is changed. This distortion has no effect on voice communication but it has an significant effect on data communication. In other words, it is impossible to send data stream with adjacent 2 periods. Therefore, in case of using 2-tone FSK, it is needed to send at least 3 periods to transmit 1 bit. Therefore we implemented the modem using modified phase-delay shift keying to transmit 1 tone signal for high speed transmission. In the 1200[bps] mode, it generates 0, $187{\mu}s$, delay time at 1.3kHz symbol frequency, and in the 2400[bps] mode, 0, $70{\mu}s\;130{\mu}s\;200{\mu}s$, delay time at 1.5kHz symbol frequency. Finally, in the maximum 3600[bps] mode, it generates 0, $100{\mu}s\;160{\mu}s\;250{\mu}s$ 2.0kHz symbol frequency. The measured results of the implemented SSB modem shows a good transfer functional characteristic by spectrum analyzer, almost same bandwidth in pass band and 20dB higher SNR comparing the emu FACTOR and American CLOVER and in the experimental transmitting test, we verified the transmitted data is received correctly in platform.

A single-memory based FFT/IFFT core generator for OFDM modulation/demodulation (OFDM 변복조를 위한 단일 메모리 구조의 FFT/IFFT 코어 생성기)

  • Yeem, Chang-Wan;Jeon, Heung-Woo;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.253-256
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    • 2009
  • This paper describes a core generator (FFT_Core_Gen) which generates Verilog HDL models of 8 different FFT/IFFT cores with $N=64{\times}2^k$($0{\leq}k{\leq}7$ for OFDM-based communication systems. The generated FFT/IFFT cores are based on in-place single memory architecture, and use a hybrid structure of radix-4 and radix-2 DIF algorithm to accommodate various FFT lengths. To achieve both memory reduction and the improved SQNR, a conditional scaling technique is adopted, which conditionally scales the intermediate results of each computational stage, and the internal data and twiddle factor has 14 bits. The generated FFT/IFFT cores have the SQNR of 58-dB for N=8,192 and 63-dB for N=64. The cores synthesized with a $0.35-{\mu}m$ CMOS standard cell library can operate with 75-MHz@3.3-V, and a 8,192-point FFT can be computed in $762.7-{\mu}s$, thus the cores satisfy the specifications of wireless LAN, DMB, and DVB systems.

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In-Band Full-Duplex Wireless Communication Using USRP (USRP 장치를 이용한 동일대역 전이중 무선통신 연구)

  • Park, Haeun;Yoon, Jiyong;Kim, Youngsik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.30 no.3
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    • pp.229-235
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    • 2019
  • The implementation of an in-band full-duplex wireless communication system is demonstrated in this study. In the analog/RF domain, the self-interference(SI) signal is reduced using a separate antenna for the transmitter and receiver paths, and most of the SI signal is canceled in the digital domain. A software defined radio(SDR) is used to implement the in-band full-duplex wireless communication system. The USRP X310 device uses transmitting and receiving antennas. By adjusting the gain of the transmitting and receiving ends of the SDR device, the magnitude of the SI signal entering the receiving antenna, and the size of the received signal from the outside, are both set to -64 dB. To verify the in-band full-duplex wireless communication performance, the source data is image and orthogonal frequency-division multiplexing is used for modulation. A WiFi standard frame with a carrier frequency of 2.67 GHz and bandwidth of 20 MHz is used. In the received signal, the SI signal is canceled by digital signal processing and the SI signal is attenuated by up to 34 dB. OFDM demodulation was impossible when the SI signal was not removed. However, the bit error rate is reduced to $2.63{\times}10^{-5}$ when the SI signal is attenuated by 34 dB, and no error is detected in the 100 Mbit data output as a result of passing through the Viterbi decoder.

Wideband 6-port Phase Correlator Using Caxial Cable Impedance Transformer and Wireline Coupler (동축선 임피던스 변환기와 Wireline Coupler를 이용한 광대역 6-단자 위상 상관기)

  • Park, Ung-hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.8
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    • pp.1188-1195
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    • 2022
  • The 6-port phase correlator consists of one in-phase power divider and three 3-dB 90-degree phase difference power dividers, and is mainly used in a demodulation circuit that determines the phase of an input signal. This paper proposes the wideband 6-port phase correlator that consists of an in-phase power divider using a wideband 2:1 impedance transformer with three 37.5-Ω coaxial cables, and a 3-dB 90-degree phase difference power divide using Wireline. The proposed wideband phase correlator fabricated at a center frequency of 1000MHz has the value of the input reflection coefficient(S11 and S22) -14dB or less in the frequency range of 640~1270MHz. Also, the signal transmission characteristic(Si1), from the in-phase power divider input port to four output ports, has the amplitude of -6.5±0.6dB and the phase error of within ±3.4°, and the signal transmission characteristic(Si2), from the 90 degree phase difference power divider input port to four output ports, has the amplitude of -6.1±0.6dB and the phase error of within ±6.2°.

A channel parameter-based weighting method for performance improvement of underwater acoustic communication system using single vector sensor (단일 벡터센서의 수중음향 통신 시스템 성능 향상을 위한 채널 파라미터 기반 가중 방법)

  • Kang-Hoon, Choi;Jee Woong, Choi
    • The Journal of the Acoustical Society of Korea
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    • v.41 no.6
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    • pp.610-620
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    • 2022
  • An acoustic vector sensor can simultaneously receive vector quantities, such as particle velocity and acceleration, as well as acoustic pressure at one location, and thus it can be used as a single input multiple output receiver in underwater acoustic communication systems. On the other hand, vector signals received by a single vector sensor have different channel characteristics due to the azimuth angle between the source and receiver and the difference in propagation angle of multipath in each component, producing different communication performances. In this paper, we propose a channel parameter-based weighting method to improve the performance of an acoustic communication system using a single vector sensor. To verify the proposed method, we used communication data collected from the experiment conducted during the KOREX-17 (Korea Reverberation Experiment). For communication demodulation, block-based time reversal technique which is robust against time-varying channels were utilized. Finally, the communication results showed that the effectiveness of the channel parameter-based weighting method for the underwater communication system using a single vector sensor was verified.